Odd number frequency division with symmetrical output

Claim 1

In a chain of dividers, each having a clock input and an output, a method of dividing a clock signal by an odd number N to obtain a symmetrical, divider output, comprising: associating with each divider a binary digit one or zero so that the combination of the digits represents the number N in binary form; selecting as controlled dividers the divider associated with the least significant digit and dividers associated with each binary zero digit; selecting as uncontrolled dividers the divider associated with the most significant digit and the remaining dividers associated with each binary one digit; exclusive NORing the output of the divider associated with the most significant digit with the clock signal to provide a first control signal; applying the first control signal to the clock input of the divider associated with the least significant digit; for every other controlled divider, exclusive NORing the output of the divider associated with the most significant digit with the output of an immediately preceding divider in the chain, and applying the resultant control signal to the clock input of the controlled divider; and coupling to the clock input of each uncontrolled divider to the output of an immediately preceding divider, whereby the divider associated with the most significant digit develops a symmetrical output whose frequency is N times lower than the frequency of the clock signal.