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US4377816A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor element with zone guard rings

Assignee: BBC Brown Boveri AG Switzerland
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Filing: 1979-09-26
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Granted: 1983-03-22
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Expires: 1999-09-26
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Abstract

Abstract A semiconductor element having at least one pn junction and provided with zone guard rings for improving the suppression behavior of the pn junction, wherein the pn junction extends to the peripheral or side surface of the element and the first of a series of guard rings is coordinated with the pn junction and is bounded by the peripheral or side surface and by the lower planar surface of the element.

Inventors

  • 👤 Roland Sittig

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 22:43
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/103; H10D62/105; H10D62/106; H10D62/17; H10D62/192; H10D62/199; H10D8/00; H10D84/00; H10D84/101; H10D84/131; H10D84/135; H10D84/136

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 204 words
A semiconductor element of disc shape having upper and lower surfaces and a peripheral surface, comprising: at least one pn junction with a higher doped conductivity zone on one side and a lower doped zone of the opposite conductivity on the other side, said pn junction extending to the peripheral surface; said lower doped zone having a surface forming a part of said lower surface and a part of said peripheral surface; at least one zone guard ring being established in said lower doped zone by a ring shaped region formed inside said lower doped zone, said ring-shaped region having a conductivity type opposite to that of said lower doped zone, and being bounded by parts of said lower and said peripheral surfaces, said surface parts of said lower and said peripheral surfaces bounding said at least one zone guard ring being without electrical contacts; and the pn junction and the at least one zone guard ring separated by an interval, a, selected small enough such that upon application of a reverse voltage to the pn junction the region of the semiconductor between the pn junction and the guard ring can be depleted of charge carriers at a voltage insufficient to cause junction breakdown.
Claim 2
Dependent Claim 204 words
A semiconductor element of disc shape having upper and lower surfaces and a peripheral surface, comprising: at least one pn junction with a higher doped conductivity zone on one side and a lower doped zone of the opposite conductivity on the other side, said pn junction extending to the peripheral surface; said lower doped zone having a surface forming a part of said lower surface and a part of said peripheral surface; at least one zone guard ring being established in said lower doped zone by a ring shaped region formed inside said lower doped zone, said ring-shaped region having a conductivity type opposite to that of said lower doped zone, and being bounded by parts of said lower and said peripheral surfaces, said surface parts of said lower and said peripheral surfaces bounding said at least one zone guard ring being without electrical contacts; and the pn junction and the at least one zone guard ring separated by an interval, a, selected small enough such that upon application of a reverse voltage to the pn junction the region of the semiconductor between the pn junction and the guard ring can be depleted of charge carriers at a voltage insufficient to cause junction breakdown.
Claim 3
Dependent Claim 106 words
A semiconductor element according to claim 1, further comprising: said higher doped zone being of P+ conductivity type and said lower doped zone being of N- conductivity type and having a N+ conductivity type region diffused therein contiguous with said lower surface, thereby forming a P+, N-, N+ avalanche diode structure; wherein the N+ zone is arranged planar with the lower surface and the at least one zone guard ring is formed by a P zone extending into the N- zone; and wherein the doping concentration of the P+ zone is smaller at the peripheral surface than it is in the remainder of the P+ zone.
Claim 4
Dependent Claim 121 words
A semiconductor element according to claim 1 further comprising: said higher doped zone being of P conductivity type and having a N+ region formed therein contiguous with said upper surface, said lower doped zone being of N- conductivity type and having a P+ region formed therein contiguous with said lower surface, thereby to define a N+,P,N-,P+ thyristor structure wherein the N+ and P+ emitter zones are planar and arranged on opposite planes which define the top and bottom surfaces; the at least one zone guard ring formed by a P zone extending into the N- base zone; and the doping concentration of the P base zone being smaller at the peripheral surface than in the remainder of the P base zone.
Claim 5
Dependent Claim 43 words
A semiconductor element according to claim 2, further comprising: at least one additional zone guard ring formed between the at least one zone guard ring and the planar zone bordering on the lower surface, the additional guard ring bounded by the lower surface.
Claim 6
Dependent Claim 37 words
A semiconductor element according to claim 4, further comprising: an etched groove formed between the at least one zone guard ring and the planar zone bordering on the lower surface, said groove bounded by the lower surface.
Claim 7
Dependent Claim 42 words
A semiconductor element according to claim 3, further comprising: at least one additional guard ring formed between the at least one zone guard ring and the planar zone bordering on the lower surface, the additional guard ring bounded by the lower surface.
Claim 8
Dependent Claim 37 words
A semiconductor element according to claim 3, further comprising: an etched groove formed between the at least one zone guard ring and the planar zone bordering on the lower surface, said groove bounded by the lower surface.
Claim 9
Dependent Claim 65 words
A semiconductor element according to claims 1, 2, 3, 4, 5, 6 or 7, further comprising: the interval, a, selected such that the region of the semiconductor between the pn junction and the guard ring can be depleted of charge carriers if a reverse voltage applied to the pn junction has increased to a half of a maximum reverse voltage which results in junction breakdown.
Claim 10
Dependent Claim 54 words
A semiconductor element according to claim 8, further comprising: the interval, a, selected such that the region of the semiconductor element between the pn junction and the guard ring can be depleted of charge carriers if a reverse voltage applied to the pn junction has increased to a third of said maximum reverse voltage.

References Cited (Backward Citations)

US3404295A Cited
US3341380A Cited
US3343050A Cited
US3612959A Cited
US4003072A Cited
US3994011A Cited
US3984859A Cited
US4125415A Cited
US4158206A Cited
US4242690A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-03-21 1986-09-20 1987-03-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-03-21 1990-09-20 1991-03-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-03-21 1994-09-20 1995-03-22 $7700.00 Window Closed / Lapsed

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