US4373252A
Expired / Lapsed
US
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Method for manufacturing a semiconductor structure having reduced lateral spacing between buried regions
Assignee: National Semiconductor Corp
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Filing: 1981-02-17
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Granted: 1983-02-15
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Expires: 2001-02-17
Abstract
Abstract The lateral spacing between buried regions separated by oxide-isolation regions in a semiconductor structure is reduced to as little as one micron by performing a deep implantation of ions of the conductivity type opposite to that of the buried regions generally into portions of the substrate below the sites where the oxide-isolation regions are formed.
Inventors
- 👤 Robert E. Caldwell
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:13
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10P30/202; H10P30/204; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/0124; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13; H10W15/00; H10W15/01
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
317 words
In a process for fabricating a semiconductor structure, a method for reducing the lateral spacing between buried regions, the method comprising the steps of: providing a semiconductor substrate of a first conductivity type having an electrically insulating layer along an upper surface of the substrate; forming two laterally spaced apart holes through the insulating layer to the upper surface of the substrate; introducing a semiconductor dopant of a second conductivity type opposite to the first conductivity type through the holes in the insulating layer into the substrate to form two laterally spaced apart doped regions of the second conductivity type in the substrate; removing the remainder of the insulating layer; implanting ions of a chemical species of the first conductivity type into the upper surface of the substrate at a selected dosage; forming an epitaxial layer on the upper surface of the substrate; forming a groove in a portion of the epitaxial layer overlying that portion of the substrate between the doped regions of the substrate; and exposing the surface of the epitaxial layer exposed by the groove to a selected oxidizing environment to form an electrically insulating oxidized region which extends down into a portion of the substrate between the doped regions wherein ions of the chemical species implanted into the surface of the substrate diffuse downwardly during the exposing step to define a more highly doped region of the first conductivity type between the doped regions and adjacent to the oxidized regions, the more highly doped region having a net dopant concentration greater than the net dopant concentration of an adjacent portion of the first conductivity type of the substrate and the selected dosage being sufficiently high such that no inversion into a doped region of the second conductivity type occurs in the more highly doped region, whereby the more highly doped and oxidized regions in combination electrically isolate the doped regions from each other.
Claim 2
Dependent Claim
317 words
In a process for fabricating a semiconductor structure, a method for reducing the lateral spacing between buried regions, the method comprising the steps of: providing a semiconductor substrate of a first conductivity type having an electrically insulating layer along an upper surface of the substrate; forming two laterally spaced apart holes through the insulating layer to the upper surface of the substrate; introducing a semiconductor dopant of a second conductivity type opposite to the first conductivity type through the holes in the insulating layer into the substrate to form two laterally spaced apart doped regions of the second conductivity type in the substrate; removing the remainder of the insulating layer; implanting ions of a chemical species of the first conductivity type into the upper surface of the substrate at a selected dosage; forming an epitaxial layer on the upper surface of the substrate; forming a groove in a portion of the epitaxial layer overlying that portion of the substrate between the doped regions of the substrate; and exposing the surface of the epitaxial layer exposed by the groove to a selected oxidizing environment to form an electrically insulating oxidized region which extends down into a portion of the substrate between the doped regions wherein ions of the chemical species implanted into the surface of the substrate diffuse downwardly during the exposing step to define a more highly doped region of the first conductivity type between the doped regions and adjacent to the oxidized regions, the more highly doped region having a net dopant concentration greater than the net dopant concentration of an adjacent portion of the first conductivity type of the substrate and the selected dosage being sufficiently high such that no inversion into a doped region of the second conductivity type occurs in the more highly doped region, whereby the more highly doped and oxidized regions in combination electrically isolate the doped regions from each other.
Claim 3
Dependent Claim
57 words
A method as in claim 1 wherein ions of the chemical species implanted in the substrate further diffuse upward and downward within the doped regions during the step of exposing, the selected dosage not being high enough to cause any portion of either doped region to be of the first conductivity type after the step of oxidizing.
Claim 4
Dependent Claim
49 words
A method as in claim 2 and further including, between the steps of forming a groove and exposing the surface area, the step of pre-depositing a semiconductor dopant of the first conductivity type to a shallow depth in the surface area of the epitaxial layer exposed by the groove.
Claim 5
Dependent Claim
35 words
A method as in claim 2 or 3 wherein the net dopant concentration in the more highly doped region is approximately in the range of 5×10 16 atoms/centimeter 3 to 5×10 17 atoms/centimeter 3 .
Claim 6
Dependent Claim
19 words
A method as in claim 4 wherein the first conductivity type is P-type and the chemical species is boron.
Claim 7
Dependent Claim
11 words
A method as in claim 5 wherein the substrate comprises silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-02-14 | 1986-08-16 | 1987-02-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-02-14 | 1990-08-16 | 1991-02-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-02-14 | 1994-08-16 | 1995-02-15 | $7700.00 | Window Closed / Lapsed |