High performance dynamic sense amplifier with active loads

Claim 1

A sense amplifier for a semiconductor memory device of the type having an array of rows and columns of memory cells with each column split into two column line halves and sense amplifiers connected to pairs of sense nodes at ends of each pair of column line halves, each sense amplifier comprising: a pair of cross-coupled driver transistors, a pair of coupling transistors, a pair of grounding transistors and a pair of pull-up transistors, each of the transistors having a current path and a control electrode, means connecting the current path of each of the coupling transistors in series with the current path of a separate one of the driver transistors between one of the sense nodes and a grounding node and connecting the current paths of both of the grounding transistors in parallel between the grounding node and reference potential, the current paths of the pull-up transistors being connected separately between the sense nodes and a supply voltage, means for precharging the sense nodes prior to an active operating cycle, means for addressing a selected row of the memory cells in the array at a first time in the beginning of said operating cycle, means for maintaining the voltage on the control electrodes of the coupling transistors at a level to render the current paths highly conductive prior to said first time, means for applying a clock voltage to turn on one of the grounding transistors at a second time subsequent to the said first time in the beginning of an active operating cycle and for applying another clock voltage to turn on the other of the grounding transistors at a third time subsequent to the second time, said one of the grounding transistors being much smaller than the other of the grounding transistors, coupling means separately connecting the control electrodes of the pull-up transistors to the sense nodes, the coupling means being conductive only for a given voltage differential during the active operating cycle, clock means to boost the voltage on the control electrode of one of the pull-up transistors higher at a fourth time in the active operating cycle just following the third time, means to shift the voltage on the control electrodes of the coupling transistors from a higher level at about said first time prior to the beginning of active operating cycle to a lower level during the active operating cycle.