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US4365261A Expired / Lapsed US ⏱️ 0.0 years remaining

Co-planar barrier-type charge coupled device with enhanced storage capacity and decreased leakage current

Assignee: Texas Instruments Inc
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Filing: 1977-08-26
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Granted: 1982-12-21
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Expires: 1997-08-26
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Abstract

Abstract A charge coupled device is disclosed which includes a plurality of stages having increased charge storage capacity and decreased leakage current. Each stage is comprised of a semiconductor substrate of a first-type conductivity having a first surface. An insulating layer of uniform thickness lies on the first surface. A charge transfer channel extends through each stage. Phase electrodes lie on the insulating layer transversely to the channel. The semiconductor substrate under each phase electrode is divided into a barrier region and an adjacent well region bounded by the channel. A shallow dopant layer of the first-type conductivity lies in each of the barrier regions relatively near to the first surface. A buried channel dopant layer of a second-type conductivity lies in the well regions and the barrier regions under and relatively near to the shallow first-type conductivity dopant layer. Additionally, an enhanced first-type conductivity dopant layer lies in the well regions and the barrier regions under and relatively near to the buried channel dopant layer of second-type conductivity.

Inventors

  • 👤 Pallab K. Chatterjee
  • 👤 Aloysious F. Tasch, Jr.

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 16:37
CPC Classifications
H; H10; H10D; H10D44/00; H10D44/01; H10D44/041; G; G11; G11C; G11C19/00; G11C19/28; G11C19/287; H10D44/40; H10D44/45; H10D44/472; H10D44/474; H10D84/00; H10D84/01; H10D84/0198; H10D84/02; H10D84/03; H10D84/038; H10D84/891

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 229 words
A charge coupled device comprising: a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface; a body of insulating material disposed on said first surface of said substrate; means defining a buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate and providing a charge transfer channel; first and second spaced apart phase electrodes overlying said channel in transverse relation thereto and arranged with respect to said body of insulating material so as to provide a layer of insulating material of uniform thickness between each of said phase electrodes and said first surface of said substrate; spaced relatively shallow regions having a dopant impurity of P-type conductivity lying within said buried channel layer of N-type conductivity near said first surface of said substrate, each of said relatively shallow P-type conductivity regions extending beneath a corresponding one of said first and second phase electrodes and being respectively aligned adjacent one edge thereof but terminating short of the opposite edge of the electrode corresponding thereto; said substrate under each of said first and second phase electrodes being divided into a barrier region including a respective shallow P-type conductivity region therein and an adjacent well region, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions;
Claim 2
Dependent Claim 229 words
A charge coupled device comprising: a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface; a body of insulating material disposed on said first surface of said substrate; means defining a buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate and providing a charge transfer channel; first and second spaced apart phase electrodes overlying said channel in transverse relation thereto and arranged with respect to said body of insulating material so as to provide a layer of insulating material of uniform thickness between each of said phase electrodes and said first surface of said substrate; spaced relatively shallow regions having a dopant impurity of P-type conductivity lying within said buried channel layer of N-type conductivity near said first surface of said substrate, each of said relatively shallow P-type conductivity regions extending beneath a corresponding one of said first and second phase electrodes and being respectively aligned adjacent one edge thereof but terminating short of the opposite edge of the electrode corresponding thereto; said substrate under each of said first and second phase electrodes being divided into a barrier region including a respective shallow P-type conductivity region therein and an adjacent well region, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions;
Claim 3
Dependent Claim 150 words
an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes; and the P-type conductivity dopant impurity of each of said relatively shallow P-type conductivity regions having a Gaussian distribution with a peak lying within 500 A-2000 A from said first surface of said substrate, the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a Gaussian distribution with a peak lying within 3000 A-10,000 A from said first surface, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a Gaussian distribution with a peak lying within 5000 A-15,000 A from said first surface.
Claim 4
Dependent Claim 150 words
an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes; and the P-type conductivity dopant impurity of each of said relatively shallow P-type conductivity regions having a Gaussian distribution with a peak lying within 500 A-2000 A from said first surface of said substrate, the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a Gaussian distribution with a peak lying within 3000 A-10,000 A from said first surface, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a Gaussian distribution with a peak lying within 5000 A-15,000 A from said first surface.
Claim 5
Dependent Claim 84 words
A charge coupled device as set forth in claim 1, wherein the P-type conductivity dopant impurity of each of said relatively shallow P-type conductivity regions has a peak density of approximately (1.0-50)×10 17 ions/cm 3 , the N-type conductivity dopant impurity of said N-type conductivity buried channel layer has a peak density of approximately (0.5-50)×10 16 ions/cm 3 , and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer has a peak density of approximately (1.0-50)×10 17 ions/cm 3 .
Claim 6
Dependent Claim 358 words
A charge coupled device comprising: a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface; a body of insulating material disposed on said first surface of said substrate; means defining a buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate and providing a charge transfer channel; first and second spaced apart phase electrodes overlying said channel in transverse relation thereto and arranged with respect to said body of insulating material so as to provide a layer of insulating material of uniform thickness between each of said phase electrodes and said first surface of said substrate; spaced relatively shallow regions having a dopant impurity of P-type conductivity lying within said buried channel layer of N-type conductivity near said first surface of said substrate, each of said relatively shallow P-type conductivity regions extending beneath a corresponding one of said first and second phase electrodes and being respectively aligned adjacent one edge thereof but terminating short of the opposite edge of the electrode corresponding thereto; said substrate under each of said first and second phase electrodes being divided into a barrier region including a respective shallow P-type conductivity region therein and an adjacent well region, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions; an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes; and the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a relatively uniform distribution extending from said first surface of said substrate to approximately 3000 A-10,000 A below said first surface, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a relatively uniform distribution extending from said N-type conductivity buried channel layer to approximately 5000 A-15,000 A below said first surface.
Claim 7
Dependent Claim 358 words
A charge coupled device comprising: a substrate of semiconductor material having a dopant impurity of P-type conductivity, said substrate having a first surface; a body of insulating material disposed on said first surface of said substrate; means defining a buried channel layer having a dopant impurity of N-type conductivity in said substrate lying adjacent to said first surface of said substrate and providing a charge transfer channel; first and second spaced apart phase electrodes overlying said channel in transverse relation thereto and arranged with respect to said body of insulating material so as to provide a layer of insulating material of uniform thickness between each of said phase electrodes and said first surface of said substrate; spaced relatively shallow regions having a dopant impurity of P-type conductivity lying within said buried channel layer of N-type conductivity near said first surface of said substrate, each of said relatively shallow P-type conductivity regions extending beneath a corresponding one of said first and second phase electrodes and being respectively aligned adjacent one edge thereof but terminating short of the opposite edge of the electrode corresponding thereto; said substrate under each of said first and second phase electrodes being divided into a barrier region including a respective shallow P-type conductivity region therein and an adjacent well region, said buried channel layer of N-type conductivity extending through said barrier regions and said well regions; an enhanced relatively deep layer having a dopant impurity of P-type conductivity and of greater concentration than the P-type conductivity dopant impurity in the semiconductor material of said substrate disposed within said substrate at a depth spaced from said first surface and extending through said barrier regions and said well regions beneath said first and second phase electrodes; and the N-type conductivity dopant impurity of said N-type conductivity buried channel layer having a relatively uniform distribution extending from said first surface of said substrate to approximately 3000 A-10,000 A below said first surface, and the P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer having a relatively uniform distribution extending from said N-type conductivity buried channel layer to approximately 5000 A-15,000 A below said first surface.
Claim 8
Dependent Claim 62 words
A charge coupled device as set forth in claim 3, wherein the density of the relatively uniformly distributed N-type conductivity dopant impurity of said N-type buried channel layer is approximately (0.5-50)×10 16 ions/cm 3 , and the density of the relatively uniformly distributed P-type conductivity dopant impurity of said enhanced relatively deep P-type conductivity layer is approximately (1.0-50)×10 17 ions/cm 3 .

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-12-20 1986-06-21 1986-12-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-12-20 1990-06-21 1990-12-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-12-20 1994-06-21 1994-12-21 $7700.00 Window Closed / Lapsed

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