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US4344223A Expired / Lapsed US ⏱️ 0.0 years remaining

Monolithic hybrid integrated circuits

Assignee: AT&T Inc
•
Filing: 1980-11-26
•
Granted: 1982-08-17
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Expires: 2000-11-26
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Abstract

Abstract A method of fabricating a thin film semiconductor hybrid circuit is disclosed. After processing of the integrated circuit in the semiconductor wafer up to the point of establishing ohmic contacts (14) to devices (13), a thin film RC circuit is fabricated on an insulating layer (11,12) overlying the wafer. This is accomplished by first forming the capacitor anodes (15') on the insulator by depositing and etching a layer such as alpha tantalum. Resistors (16) are then formed by depositing and etching a layer such as tantalum nitride. Portions of the capacitor anodes are then anodized using an appropriate mask (17) to form the capacitor dielectric. Capacitor counterelectrodes (20') and interconnect conductors (20'") are formed by depositing and etching successive layers of metal such as nickel-chromium and gold. After all thin film components are formed, the resistors and capacitors are stabilized by heating the circuit in an atmosphere comprising high pressure steam.

Inventors

  • 👤 Gary A. Bulger
  • 👤 Lyle D. Heck
  • 👤 Robert D. Huttemann
  • 👤 Joseph M. Morabito
  • 👤 Raymond C. Pitetti
  • 👤 Burton A. Unger
  • 👤 Donald J. Vallere

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 11:16
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/47; H10D1/60; H10D1/68; H10D88/00

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 168 words
A method for fabricating thin film resistor (16) and capacitor (23) components on an insulating layer (11,12) formed over a semiconductor substrate (10) where said substrate includes semiconductor devices (13) formed therein and ohmic contacts (14) to said devices characterized in the steps of defining a capacitor anode (15') selectively on said insulating layer from a first metal layer; depositing a layer of resistive material over the resulting structure and defining a resistor (16) in a selected area; forming a mask (17) and a first interconnect pattern (17') for selective oxidation of the capacitor anode by depositing a second metal layer and etching selected areas; forming a dielectric (18) on the capacitor anode by anodization in an electrolyte at a low voltage; removing the second metal layer; forming the capacitor counter electrode and a second interconnect conductor pattern by depositing a third metal layer (19,20) and etching selected areas; and stabilizing said resistor and capacitor by heating the resulting structure in an atmosphere comprising steam at high pressure.
Claim 2
Independent Claim 168 words
A method for fabricating thin film resistor (16) and capacitor (23) components on an insulating layer (11,12) formed over a semiconductor substrate (10) where said substrate includes semiconductor devices (13) formed therein and ohmic contacts (14) to said devices characterized in the steps of defining a capacitor anode (15') selectively on said insulating layer from a first metal layer; depositing a layer of resistive material over the resulting structure and defining a resistor (16) in a selected area; forming a mask (17) and a first interconnect pattern (17') for selective oxidation of the capacitor anode by depositing a second metal layer and etching selected areas; forming a dielectric (18) on the capacitor anode by anodization in an electrolyte at a low voltage; removing the second metal layer; forming the capacitor counter electrode and a second interconnect conductor pattern by depositing a third metal layer (19,20) and etching selected areas; and stabilizing said resistor and capacitor by heating the resulting structure in an atmosphere comprising steam at high pressure.
Claim 3
Dependent Claim 21 words
The method according to claim 1 wherein the first metal layer comprises alpha tantalum and the resistive material comprises tantalum nitride.
Claim 4
Dependent Claim 21 words
The method according to claim 1 wherein a portion of the first metal layer is also defined over said ohmic contacts.
Claim 5
Dependent Claim 13 words
The method according to claim 1 wherein the second metal layer comprises titanium.
Claim 6
Dependent Claim 18 words
The method according to claim 1 wherein the third metal layer comprises successive layers of nickel-chromium and gold.
Claim 7
Dependent Claim 17 words
The method according to claim 1 wherein the voltage applied for anodization is less than 100 volts.
Claim 8
Dependent Claim 34 words
The method according to claim 1 wherein the resistors and capacitors are stabilized at a temperature in the range 250-350 degrees C. for a time of 1/22 hours in a pressure of 700-1200 psi.
Claim 9
Dependent Claim 27 words
The method according to claim 1 wherein beam leads (22) are formed around the periphery of said circuit by plating selected areas of said third metal layer.
Claim 10
Dependent Claim 14 words
The method according to claim 1 wherein the resistors are defined by plasma etching.
Claim 11
Dependent Claim 53 words
The method according to claim 1 wherein the insulating layer comprises successive layers of SiO 2 and Si 3 N 4 and the capacitor is formed on the Si 3 N 4 layer while the resistor is formed on an area of SiO 2 not covered by said Si 3 N 4 layer.
Claim 12
Dependent Claim 13 words
The method according to claim 1 wherein the ohmic contacts comprise platinum silicide.
Claim 13
Independent Claim 234 words
A method for fabricating thin film resistor (16) and capacitor (23) components on an insulating layer (11,12) formed over a silicon substrate (10) where said substrate includes active devices (13) formed therein and platinum silicide ohmic contacts (14) to said devices characterized in the steps of defining a capacitor anode (15') and a protective covering (15") for the ohmic contacts selectively on said insulating layer from a first metal layer comprising alpha tantalum; depositing a layer of resistive material comprising tantalum nitride over the resulting structure and defining a resistor (16) in a selected area; forming a mask (17) and a first interconnect pattern (17') for selective oxidation of the capacitor anode by depositing a second metal layer comprising titanium and chemically etching selected areas; forming a dielectric (18) on the capacitor anode by anodization in an electrolyte at a voltage of less than 100 volts; removing the titanium with an etchant which does not affect the tantalum and the dielectric; forming the capacitor counter electrode (20') and a second interconnect conductor pattern (20'") between the resistor and capacitor and the active semiconductor device by depositing successive layers of nickel-chromium (19) and gold (20) and chemically etching selected areas; and stabilizing said resistor and capacitor by heating the resulting structure in an atmosphere comprising steam at a temperature of 250-350 degrees C. for a time of 1/22 hours at a pressure of 700-1200 psi.
Claim 14
Independent Claim 234 words
A method for fabricating thin film resistor (16) and capacitor (23) components on an insulating layer (11,12) formed over a silicon substrate (10) where said substrate includes active devices (13) formed therein and platinum silicide ohmic contacts (14) to said devices characterized in the steps of defining a capacitor anode (15') and a protective covering (15") for the ohmic contacts selectively on said insulating layer from a first metal layer comprising alpha tantalum; depositing a layer of resistive material comprising tantalum nitride over the resulting structure and defining a resistor (16) in a selected area; forming a mask (17) and a first interconnect pattern (17') for selective oxidation of the capacitor anode by depositing a second metal layer comprising titanium and chemically etching selected areas; forming a dielectric (18) on the capacitor anode by anodization in an electrolyte at a voltage of less than 100 volts; removing the titanium with an etchant which does not affect the tantalum and the dielectric; forming the capacitor counter electrode (20') and a second interconnect conductor pattern (20'") between the resistor and capacitor and the active semiconductor device by depositing successive layers of nickel-chromium (19) and gold (20) and chemically etching selected areas; and stabilizing said resistor and capacitor by heating the resulting structure in an atmosphere comprising steam at a temperature of 250-350 degrees C. for a time of 1/22 hours at a pressure of 700-1200 psi.

References Cited (Backward Citations)

US3430334A Cited
US3616282A Cited
US3607679A Cited
US3718565A Cited
US3988824A Cited
US3997411A Cited
US4251326A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1985-08-16 1986-02-15 1986-08-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1989-08-16 1990-02-15 1990-08-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1993-08-16 1994-02-15 1994-08-17 $7700.00 Window Closed / Lapsed

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