Method of manufacturing bulk CMOS integrated circuits

Claim 1

An improved method for manufacturing a complementary symmetry metal oxide semiconductor integrated circuit comprising the steps of: (a) forming an oxide layer on the surface of a semiconductor substrate of a first conductivity type; (b) forming a silicon nitride layer on the surface of said oxide layer; (c) defining said silicon nitride layer to cover areas where transistors will be formed in said substrate; and (d) applying a photoresist layer over said defined silicon nitride layer; wherein the improvement comprises the steps of: (a) defining openings in said photoresist layer over areas where well regions of opposite conductivity type to said substrate will be formed; (b) implanting ions through said defined silicon nitride layer, through the underlying portions of said oxide layer and into said substrate; (c) removing said photoresist layer; (d) simultaneously driving said implanted ions into said substrate while growing a thermal oxide by heating said substrate in a dry oxygen ambient; (e) removing the silicon nitride layer and any underlying silicon dioxide portions; and (f) growing a gate oxide layer.