Patent US2633682A successfully refreshed from Google Patents.
Patent US4290831A successfully refreshed from Google Patents.
US4290831A
Expired / Lapsed
US
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Method of fabricating surface contacts for buried layer into dielectric isolated islands
Assignee: Intersil Corp
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Filing: 1980-04-18
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Granted: 1981-09-22
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Expires: 2000-04-18
Abstract
Abstract Low resistance contact paths to selected buried layers in dielectrically isolated islands are formed by V-etching the selected island moats in a substrate, non-selectively diffusing impurities into the surface of the substrate and selected moats, V-etching to form all the moat structure, forming a dielectric layer on said surface and moats, applying support material to over-fill said moats and cover said surface, removing the opposite surface of said substrate to expose support material, and forming devices in said opposite surface.
Inventors
- 👤 Kenneth A. Ports
- 👤 William G. Lucas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:21
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/021; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/05; Y10S148/051; Y10S148/085; Y10S148/135; Y10S438/00; Y10S438/973
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
199 words
A method of fabricating an integrated circuit having a plurality of dielectrically isolated islands comprising: etching a first surface of a substrate to form preselected portions of an isolation moat structure of preselected to be formed substrate islands using a first mask exposing said preselected portions; non-selectively introducing impurities into said first surface and said preselected portions of said moat to form a low resistive region along said first surface and along said preselected portions of said moat; etching said first surface to form a uniform isolation moat structure using a mask exposing the total isolation moat structure including said preselected portions; forming a dielectric layer along said first surface and said moat structure; covering said dielectric layer with material which over fills said moat and forms a support structure; reducing the thickness of said substrate from a second surface opposite said first surface sufficiently to expose portions of said support structure in said moat and form isolated substrate islands; and forming devices in said second surface of said substrate islands, said low resistive regions along said preselected island's wall forming a low resistive path to the buried low resistive region at said first surface of said preselected islands.
Claim 2
Independent Claim
199 words
A method of fabricating an integrated circuit having a plurality of dielectrically isolated islands comprising: etching a first surface of a substrate to form preselected portions of an isolation moat structure of preselected to be formed substrate islands using a first mask exposing said preselected portions; non-selectively introducing impurities into said first surface and said preselected portions of said moat to form a low resistive region along said first surface and along said preselected portions of said moat; etching said first surface to form a uniform isolation moat structure using a mask exposing the total isolation moat structure including said preselected portions; forming a dielectric layer along said first surface and said moat structure; covering said dielectric layer with material which over fills said moat and forms a support structure; reducing the thickness of said substrate from a second surface opposite said first surface sufficiently to expose portions of said support structure in said moat and form isolated substrate islands; and forming devices in said second surface of said substrate islands, said low resistive regions along said preselected island's wall forming a low resistive path to the buried low resistive region at said first surface of said preselected islands.
Claim 3
Dependent Claim
27 words
The method according to claim 1 wherein said first surface of said substrate has a [100] crystal orientation and said etching steps are performed until they V-out.
Claim 4
Dependent Claim
24 words
The method according to claim 1 wherein said first mask is formed to have apertures undersized compared to the apertures in said second mask.
Claim 5
Dependent Claim
38 words
The method according to claim 3 wherein said impurities are introduced into said surface of said preselected moat portions a sufficient depth to assure a low resistive layer along the moat structure after said second mentioned etching step.
Claim 6
Dependent Claim
19 words
The method according to claim 1 wherein said impurities introduced are of the same conductivity type as said substrate.
Claim 7
Dependent Claim
19 words
The method according to claim 1 wherein said impurities introduced are of the opposite conductivity type as said substrate.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1984-09-21 | 1985-03-23 | 1985-09-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1988-09-21 | 1989-03-23 | 1989-09-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1992-09-21 | 1993-03-23 | 1993-09-22 | $7700.00 | Window Closed / Lapsed |