Method for digital frequency trimming an oscillator in an electronic timepiece

Claim 1

A method for trimming the frequency of a piezoelectric crystal oscillator in a timepiece having a count-down circuit coupled to the oscillator to receive an input signal therefrom and provide a lower frequency output signal, time indicating means coupled to the count-down circuit to be activated thereby, the piezoelectric crystal oscillator having a nominal frequency above a desired frequency, and an inhibit circuit means to periodically start blocking of oscillator pulses and preset a counter to a first count number stored in a nonvolatile memory circuit, said counter being responsive to the output of the oscillator for increasing the count preset therein to a second predetermined count, said inhibit circuit means stopping the blocking of oscillator pulses in response to the second predetermined count of said counter, wherein said first count number is determined and written into said nonvolatile memory circuit, including the steps of: detecting signals externally indicating untrimmed oscillator frequency generated by the untrimmed oscillator; determining the first count number such that the difference count between the first and second count equals the frequency difference between the untrimmed oscillator and the desired frequency; permanently writing the first count into said memory circuit.

Claim 2

A method for trimming the frequency of a piezoelectric crystal oscillator in a timepiece having a count-down circuit coupled to the oscillator to receive an input signal therefrom and provide a lower frequency output signal, time indicating means coupled to the count-down circuit to be activated thereby, the piezoelectric crystal oscillator having a nominal frequency above a desired frequency, and an inhibit circuit means to periodically start blocking of oscillator pulses and preset a counter to a first count number stored in a nonvolatile memory circuit, said counter being responsive to the output of the oscillator for increasing the count preset therein to a second predetermined count, said inhibit circuit means stopping the blocking of oscillator pulses in response to the second predetermined count of said counter, wherein said first count number is determined and written into said nonvolatile memory circuit, including the steps of: detecting signals externally indicating untrimmed oscillator frequency generated by the untrimmed oscillator; determining the first count number such that the difference count between the first and second count equals the frequency difference between the untrimmed oscillator and the desired frequency; permanently writing the first count into said memory circuit.

Claim 4

A method of trimming the frequency of a quartz crystal controlled oscillator in a wristwatch having a count-down circuit coupled to the oscillator to receive an input signal therefrom and provide a lower frequency output signal, time indicating means being coupled to the count-down circuit to be activated thereby, said quartz crystal controlled oscillator having a nominal frequency above a predetermined desired frequency, and an inhibit circuit means comprising a NAND gate connected between the oscillator and the count-down circuit, said NAND gate blocking oscillator pulses to the count-down circuit upon an inhibit signal from a flip-flop circuit, said flip-flop circuit generates the inhibit signal in response to a periodic output signal from a divider circuit responding to signals from the count-down circuit, a nonvolatile memory circuit programmed to provide output signals indicative of a first count, a presettable counter coupled to said output signals of the memory circuit and being preset to a count equal to said first count in response to a preset enable signal from the flip-flop circuit and thereafter rendered receptive to oscillator signals for increasing the count of said counter to its maximum count, said flip-flop circuit being responsive to a maximum count signal from said counter to remove said inhibit signal to the NAND circuit whereby oscillator pulses are coupled to the count-down circuit, wherein said memory circuit is programmed, including the steps of: detecting signals externally indicating untrimmed oscillator frequency generated by the untrimmed oscillator; determining a frequency difference between the oscillator frequency and the desired frequency; applying a control pulse to the counter causing it to up-count with oscillator signals and stopping the counter at the first count wherein the difference count between the first count and maximum count of the counter equals the frequency difference between the untrimmed oscillator frequency and the desired frequency per unit of time; applying a signal to the memory circuit causing it to store the first count.

Claim 5

A method of trimming the frequency of a quartz crystal controlled oscillator in a wristwatch having a count-down circuit coupled to the oscillator to receive an input signal therefrom and provide a lower frequency output signal, time indicating means being coupled to the count-down circuit to be activated thereby, said quartz crystal controlled oscillator having a nominal frequency above a predetermined desired frequency, and an inhibit circuit means comprising a NAND gate connected between the oscillator and the count-down circuit, said NAND gate blocking oscillator pulses to the count-down circuit upon an inhibit signal from a flip-flop circuit, said flip-flop circuit generates the inhibit signal in response to a periodic output signal from a divider circuit responding to signals from the count-down circuit, a nonvolatile memory circuit programmed to provide output signals indicative of a first count, a presettable counter coupled to said output signals of the memory circuit and being preset to a count equal to said first count in response to a preset enable signal from the flip-flop circuit and thereafter rendered receptive to oscillator signals for increasing the count of said counter to its maximum count, said flip-flop circuit being responsive to a maximum count signal from said counter to remove said inhibit signal to the NAND circuit whereby oscillator pulses are coupled to the count-down circuit, wherein said memory circuit is programmed, including the steps of: detecting signals externally indicating untrimmed oscillator frequency generated by the untrimmed oscillator; determining a frequency difference between the oscillator frequency and the desired frequency; applying a control pulse to the counter causing it to up-count with oscillator signals and stopping the counter at the first count wherein the difference count between the first count and maximum count of the counter equals the frequency difference between the untrimmed oscillator frequency and the desired frequency per unit of time; applying a signal to the memory circuit causing it to store the first count.