Electronic timepiece

Claim 1

A standard timepiece serving as a time correction device for providing correction pulses as standard time data to effect correction of time data in an electronic timepiece, comprising: a frequency standard providing a relatively high frequency signal; a frequency converter providing a train of low frequency pulses in response to said relatively high frequency signal; a timekeeping circuit composed of first and second groups of counter means to provide standard time data composed of a plurality of time information signals in response to said low frequency pulses; correction switch means adapted to provide a control pulse when actuated; a digit selector switch means adapted to provide an input pulse when actuated to select at least one of digits indicative of said plurality of time information signals; read-out circuit means including first memory counters connected at their first inputs in series with one another and connected at their second inputs in parallel with said first group of counter means to store the counts thereof, respectively, second memory counters connected at their first inputs in parallel to said second group of counter means, respectively, to store the counts thereof, respectively, and a plurality of coupling gate means for connecting selected one of said second memory counters in series to said first memory counters in response to said input pulse, said first memory counters comprising a seconds memory counter, a minutes memory counter, an hours memory counter and an AM/PM memory counter, said second memory counters comprising a dates memory counter, a days of week memory counter, and a months counter, said coupling gate means comprising a first AND gate connected between said AM/PM memory counter and said dates memory counter, a second AND gate connected between said dates memory counter and said days of week memory counter, and a third AND gate connected between said days of week memory counter and said months counter; read-out control signal generator means responsive to said control pulse for generating sampling pulses, and first read-out control signals to shift the contents of said first memory counters, respectively, said read-out control signal generating means being also responsive to said input pulse for generating a second read-out control signal to shift the content of said selected one of said second memory counters; read-out control gate means connected to an output of said read-out circuit means for reading out the contents shifted therein, in response to said sampling pulses; and data transmitting means connected to an output of said read-out control gate means for transmitting said correction pulses to said electronic timepiece.