Modular macroprocessing system comprising a microprocessor and an extendable number of programmed logic arrays

Claim 1

Apparatus for extending the functional capability of a microprocessor having a given standard set of instructions stored therein to execute at least one additional instruction beyond its capability to execute said given standard set of instructions, said microprocessor communicating with system components through a standard bussing system comprising a control bus, an address bus and a data bus, said apparatus comprising at least one programmed logic array connected to said control, address and data busses, each said programmed logic array being equipped to interpret a respective address on said address bus as a respective additional instruction said microprocessor being connected to said control, address and data busses and providing said standard set of instructions on said control bus and addresses on said address bus, each said programmed logic array comprising instruction register means connected to said address bus for receiving and temporarily storing said respective address constituting said respective additional instruction, an AND array connected to receive each address stored in said register for generating a product term in response to said respective address, an OR array connected to receive said product term from said AND array for generating resulting signal, for executing said respective additional instruction.