Patent US4242598A successfully refreshed from Google Patents.
US4242598A
Expired / Lapsed
US
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Temperature compensating transistor bias device
Assignee: Varian Medical Systems Inc
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Filing: 1974-10-02
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Granted: 1980-12-30
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Expires: 1994-10-02
Abstract
Abstract The base-to-emitter bias voltage and current of a high frequency transistor, operating class AB or class A, is derived from a semiconductive bias device consisting of a semiconductive diode junction fed with current from a constant current source to derive a V BE voltage thereacross which is the bias source voltage. This source voltage is applied across the base-to-emitter junction of the RF transistor via the intermediary of a positive temperature coefficient silicon resistor. The diode and silicon resistor are packaged together for mounting on a heat sink common to the transistor, whereby the transistor is compensated for temperature dependent changes in V BE and h FE .
Inventors
- 👤 Joseph H. Johnson
- 👤 Lee B. Max
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 19:11
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/30; H03F1/302
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
201 words
In a semiconductive device for providing a temperature compensated bias output to be applied across the base-to-emitter junction of a transistor to be biased: a semiconductive body having first and second abutting regions therein of different conductivity type material to define a p-n diode junction therebetween; first and second electrode means for making electrical connection to said first and second regions, respectively, of said semiconductive body; injector, reference, and supplier terminal means for making electrical connections to electrical circuitry, means electrically connecting said injector terminal means and said first electrode means, means electrically interconnecting said reference terminal means and said second electrode means; resistor means having a positive temperature coefficient of resistance of sufficient magnitude to compensate for an increasing temperature coefficient of h FE of the transistor to be biased, means for electrically connecting said resistor means between said supplier terminal means and said injector terminal means; and means for mounting said semiconductive body and said resistor means in heat exchanging relation with the transistor to be biased to provide a temperature compensated bias potential across said supplier and reference terminal means as an output to be applied in circuit with the base-to-emitter junction of the transistor to be biased.
Claim 2
Dependent Claim
201 words
In a semiconductive device for providing a temperature compensated bias output to be applied across the base-to-emitter junction of a transistor to be biased: a semiconductive body having first and second abutting regions therein of different conductivity type material to define a p-n diode junction therebetween; first and second electrode means for making electrical connection to said first and second regions, respectively, of said semiconductive body; injector, reference, and supplier terminal means for making electrical connections to electrical circuitry, means electrically connecting said injector terminal means and said first electrode means, means electrically interconnecting said reference terminal means and said second electrode means; resistor means having a positive temperature coefficient of resistance of sufficient magnitude to compensate for an increasing temperature coefficient of h FE of the transistor to be biased, means for electrically connecting said resistor means between said supplier terminal means and said injector terminal means; and means for mounting said semiconductive body and said resistor means in heat exchanging relation with the transistor to be biased to provide a temperature compensated bias potential across said supplier and reference terminal means as an output to be applied in circuit with the base-to-emitter junction of the transistor to be biased.
Claim 3
Dependent Claim
39 words
The apparatus of claim 1 including, package means for enclosing said semiconductive body and said resistor means, and wherein said mounting means includes means for mounting said package means in heat exchanging relation with the transistor to be biased.
Claim 4
Dependent Claim
13 words
The apparatus of claim 1 wherein said semiconductive body is made of silicon.
Claim 5
Dependent Claim
13 words
The apparatus of claim 1 wherein said resistor means is made of silicon.
Claim 6
Dependent Claim
64 words
The apparatus of claim 2 wherein said package means includes, thermally conductive heat sinking structure to be mechanically coupled in heat exchanging relation with said transistor to be biased, a thermally conductive ceramic substrate structure overlaying said heat sinking structure in heat exchanging relation therewith, and said resistor means and said semiconductive body being mounted overlaying said substrate structure in heat exchanging relation therewith.
Claim 7
Dependent Claim
34 words
The apparatus of claim 1 wherein the area of said diode junction region of said semiconductive body is at least 1/10th the area of the base-to-emitter junction area of the transistor to be biased.
Claim 8
Dependent Claim
105 words
The apparatus of claim 1 wherein said resistor means comprises a second semiconductive body having first and second abutting layers of first and second conductivity, respectively, and of the same type conductivity, means for making electrical connection to opposite sides of said first and second layers of said same type conductivity layers, said second conductivity being at least five times greater than the conductivity of said first conductivity such that the resistance between said electrical connection means as established by the path through said first and second abutting layers is predominantly determined by the thickness of said first layer intervening between said electrical connection means.
Claim 9
Dependent Claim
27 words
The apparatus of claim 7 wherein said second semiconductive body is made of silicon, and wherein both of said first and second layers are of n-type conductivity.
Claim 10
Dependent Claim
87 words
The apparatus of claim 1 wherein said semiconductive body includes a third region abutting said second region and being of a conductivity type the same as said first region to define a second p-n junction at the interface of said second and third regions, third electrode means for making connection to said third region, and means for electrically interconnecting said second electrode means and said third electrode means for shunting said second p-n junction, whereby said three region semiconductive device is caused to operate as a diode.
Claim 11
Dependent Claim
26 words
The apparatus of claim 1 including, constant current source means connected across said injector and reference terminal means for supplying constant current through said diode junction.
Claim 12
Dependent Claim
30 words
The apparatus of claim 1 wherein said resistor means has a positive temperature coefficient of resistance of a value falling within the range of 0.2% to 1.2% per degree C.
Claim 13
Dependent Claim
37 words
The apparatus of claim 11 wherein said diode junction has a voltage drop thereacross with constant current drive therethrough that has a negative temperature coefficient falling within the range of 1.2 to 2.5 millivolts per degree C.
Claim 14
Dependent Claim
24 words
The apparatus of claim 11 wherein said resistor means has a value of resistance falling within the range of 0.4 ohm to 30 ohms.
Claim 15
Dependent Claim
134 words
In a method for temperature compensation and biasing of the base-to-emitter junction of a transistor the steps of: feeding a current through a diode p-n junction of a semiconductive body to derive a potential drop thereacross to serve as the source of a bias potential to be fed to the base-to-emitter junction of a transistor to be biased; feeding the derived bias potential across the base-to-emitter junction of the transistor to be biased via the intermediary of a positive temperature coefficient resistance of sufficient magnitude to compensate for an increasing temperature coefficient of h fe of the transistor to be biased; and mounting said semiconductive body and said resistance in heat exchanging relation with the transistor being biased to provide a temperature compensated bias potential to the base-to-emitter junction of the transistor being biased.
Claim 16
Dependent Claim
134 words
In a method for temperature compensation and biasing of the base-to-emitter junction of a transistor the steps of: feeding a current through a diode p-n junction of a semiconductive body to derive a potential drop thereacross to serve as the source of a bias potential to be fed to the base-to-emitter junction of a transistor to be biased; feeding the derived bias potential across the base-to-emitter junction of the transistor to be biased via the intermediary of a positive temperature coefficient resistance of sufficient magnitude to compensate for an increasing temperature coefficient of h fe of the transistor to be biased; and mounting said semiconductive body and said resistance in heat exchanging relation with the transistor being biased to provide a temperature compensated bias potential to the base-to-emitter junction of the transistor being biased.
Claim 17
Dependent Claim
26 words
The method of claim 14 wherein the step of feeding the current through the diode p-n junction comprises feeding a constant current through said diode junction.
Claim 18
Dependent Claim
28 words
The method of claim 14 wherein the positive temperature coefficient resistance has a positive temperature coefficient value falling within the range of 0.2% to 1.2% per degree centigrade.
Claim 19
Dependent Claim
36 words
The method of claim 15 wherein the bias potential developed across the p-n junction with constant current flow therethrough has a negative temperature coefficient falling within the range of 1.2 to 2.5 millivolts per degree centigrade.
Claim 20
Dependent Claim
26 words
The method of claim 16 wherein the positive temperature coefficient resistance has a value of resistance falling within the range of 0.4 ohms to 30 ohms.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-12-30 | 1984-06-30 | 1984-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-12-30 | 1988-06-30 | 1988-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-12-30 | 1992-06-30 | 1992-12-30 | $7700.00 | Window Closed / Lapsed |