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US3585511A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated circuit arrangement for demodulating an amplitude modulated high frequency signal

Assignee: Siemens AG
•
Filing: 1969-06-18
•
Granted: 1971-06-15
•
Expires: 1989-06-18
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Abstract

Abstract An adjusting circuit which adjusts the output current of a transistor for demodulating an amplitude modulated high frequency signal in an integrated circuit in the absence of high frequency signal comprises an asymmetrical conductor closely thermally coupled to the transistor and electrically coupled through a voltage reducing network to the input of the transistor.

Inventors

  • 👤 Eckart Schatter
  • 👤 Walter O Spichall

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 17:29
CPC Classifications
H; H03; H03D; H03D1/00; H03D1/14; H03D1/18

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 202 words
An integrated circuit for demodulating an amplitude modulated high frequency signal, including demodulating means comprising an emitter-connected transistor, the demodulating transistor having emitter, collector and base electrodes and conducting a small idling output current in the absence of a high frequency signal relative to its output current at full high frequency signal, input means connected to the base electrode of the demodulating transistor for supplying an amplitude modulated high frequency signal, and output means connected to the collector electrode of the demodulating transistor for providing the demodulated signal, said integrated circuit comprising a source oF supply voltage, an asymmetrical conductor comprising a transistor of the same conductivity type as the demodulating transistor connected to the source of supply voltage and having a collector electrode and a base electrode connected to each other, the asymmetrical conducting transistor having a voltage drop due to the supply voltage, and a resistance network connected between the collector electrode of the asymmetrical conducting transistor and the base electrode of the demodulating transistor for reducing the voltage and applying the voltage drop to the demodulating transistor whereby the voltage drop provides a stabilization which renders the magnitude of the current independent from temperature fluctuations in the demodulating transistor.
Claim 2
Dependent Claim 202 words
An integrated circuit for demodulating an amplitude modulated high frequency signal, including demodulating means comprising an emitter-connected transistor, the demodulating transistor having emitter, collector and base electrodes and conducting a small idling output current in the absence of a high frequency signal relative to its output current at full high frequency signal, input means connected to the base electrode of the demodulating transistor for supplying an amplitude modulated high frequency signal, and output means connected to the collector electrode of the demodulating transistor for providing the demodulated signal, said integrated circuit comprising a source oF supply voltage, an asymmetrical conductor comprising a transistor of the same conductivity type as the demodulating transistor connected to the source of supply voltage and having a collector electrode and a base electrode connected to each other, the asymmetrical conducting transistor having a voltage drop due to the supply voltage, and a resistance network connected between the collector electrode of the asymmetrical conducting transistor and the base electrode of the demodulating transistor for reducing the voltage and applying the voltage drop to the demodulating transistor whereby the voltage drop provides a stabilization which renders the magnitude of the current independent from temperature fluctuations in the demodulating transistor.
Claim 3
Dependent Claim 39 words
An integrated circuit as claimed in claim 1, wherein the resistance network comprises an ohmic voltage divider connected in parallel with the asymmetrical conducting transistor and having a tap point connected to the base electrode of the demodulating transistor.
Claim 4
Dependent Claim 34 words
An integrated circuit as claimed in claim 1, wherein the demodulating means further comprises a feedback resistor connected into that branch of the demodulating transistor which is common to its base and collector electrodes.
Claim 5
Dependent Claim 26 words
An integrated circuit as claimed in claim 1, wherein the demodulating means further comprises a load capacitor connected to the collector electrode of the demodulating transistor.
Claim 6
Dependent Claim 80 words
An integrated circuit as claimed in claim 1, wherein the resistance network comprises three ohmic resistors R2, R4, R5, two of which R4, R5 are connected as an ohmic voltage divider in parallel with the asymmetrical conducting transistor, the ohmic voltage divider having a tap point connected to the emitter electrode of the demodulating transistor, and the third of which R2 is connected between the base electrode of the demodulating transistor and the collector electrode of the asymmetrical conducting transistor.
Claim 7
Dependent Claim 58 words
An integrated circuit as claimed in claim 2, wherein the demodulating means further comprises a feedback resistor connected into that branch of the demodulating transistor which is common to its base and collector electrodes and forming part of the voltage divider, the tap point of the voltage divider being connected to the emitter electrode of the demodulating transistor.

References Cited (Backward Citations)

US2866892A Cited
US3275941A Cited
US3249880A Cited
US3409784A Cited
US3488599A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1974-06-14 1974-12-14 1975-06-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1978-06-14 1978-12-14 1979-06-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1982-06-14 1982-12-14 1983-06-15 $7700.00 Window Closed / Lapsed

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