US4239980A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit having an operation voltage supplying depletion type MISFET of high breakdown voltage structure
Assignee: Hitachi Ltd
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Filing: 1978-08-04
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Granted: 1980-12-16
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Expires: 1998-08-04
Abstract
Abstract A depletion type MISFET is connected between a power voltage supply line of a transistor logic circuit block and a power source voltage terminal. The gate electrode of the depletion type MISFET is connected to a reference voltage. The transistor logic circuit block has a driving MISFET and a load connected in series between the power voltage supply line and the reference voltage. The load of the transistor logic circuit is similarly constituted by a depletion type MISFET, while the driving MISFET is of enhancement type. The driving MISFET and the load MISFET in the transistor logic circuit block are built-in in a monolithic semiconductor integrated circuit, together with the MISFET for the power voltage supply to the transistor logic circuit. The drain of the power voltage supplying MISFET is connected to the power voltage supply terminal, and is made to have a high breakdown voltage structure so that the breakdown voltage between the drain and the substrate of the power voltage supplying MISFET may be larger than that of the load MISFET.
Inventors
- 👤 Akira Takanashi
- 👤 Kenzo Masuda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 19:21
CPC Classifications
G; G04; G04G; G04G99/00; H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/84
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
172 words
A monolithic semiconductor integrated circuit having a transistor circuit which includes a depletion type MISFET to the gate of which is applied a reference voltage, characterized in that said transistor circuit includes a plurality of load MISFETs and a plurality of driving MISFETs, said depletion type MISFET being connected in series with at least one of said load MISFETs and at least one of said driving MISFETs between a power source voltage terminal and the reference voltage, the sources of said load MISFETs being connected to said reference voltage through the drain-source electric paths of said driving MISFET, the drains of said load MISFETs being connected commonly to the source of said depletion type MISFET, said depletion type MISFET having its drain connected to said power source voltage terminal, wherein said depletion type MISFET has a high breakdown voltage structure such that the breakdown voltage between its drain and the substrate is higher than the breakdown voltage across the junction between said substrate and the drains of said plurality of load MISFETs.
Claim 2
Dependent Claim
172 words
A monolithic semiconductor integrated circuit having a transistor circuit which includes a depletion type MISFET to the gate of which is applied a reference voltage, characterized in that said transistor circuit includes a plurality of load MISFETs and a plurality of driving MISFETs, said depletion type MISFET being connected in series with at least one of said load MISFETs and at least one of said driving MISFETs between a power source voltage terminal and the reference voltage, the sources of said load MISFETs being connected to said reference voltage through the drain-source electric paths of said driving MISFET, the drains of said load MISFETs being connected commonly to the source of said depletion type MISFET, said depletion type MISFET having its drain connected to said power source voltage terminal, wherein said depletion type MISFET has a high breakdown voltage structure such that the breakdown voltage between its drain and the substrate is higher than the breakdown voltage across the junction between said substrate and the drains of said plurality of load MISFETs.
Claim 3
Dependent Claim
140 words
A monolithic semiconductor integrated circuit as claimed in claim 1, wherein said transistor circuit is adapted to perform digital switching operations, and wherein the current i through said depletion type MISFET connected at its gate to said reference voltage, and threshold voltage VthD, the constant βo, and the channel width W and length L of said depletion type MISFET connected at the gate to said reference voltage are so selected that the operation voltage available at the source of said depletion type MISFET connected at the gate to said reference voltage, when said depletion type MISFET is operated at the saturated region is smaller than the breakdown voltage across the junction between said substrate and the drains of said plurality of load MISFETs, and larger than the minimum operation voltage required for the digital switching operations of said transistor circuit.
Claim 4
Dependent Claim
79 words
A monolithic semiconductor integrated circuit as claimed in claim 2, wherein the parameter ##EQU14## defined by the current i through the source of said depletion type MISFET connected to the gate to said reference voltage, constant βo, channel width W and length L of said MISFET is selected to be small, such that the operation voltage available at the source of said MISFET becomes substantially equal to the power source voltage when said MISFET functions in the linear region.
Claim 5
Dependent Claim
25 words
A monolithic semiconductor integrated circuit as claimed in claim 3, wherein the value of said parameter is selected to be 16(V 2 ) or smaller.
Claim 6
Dependent Claim
25 words
A monolithic semiconductor integrated circuit as claimed in claim 3, wherein the value of said parameter is selected to be 4(V 2 ) or smaller.
Claim 7
Dependent Claim
35 words
A monolithic semiconductor integrated circuit as claimed in claim 1, 2, 3, 4, or 5, wherein said plurality of load MISFETs are of depletion type, while said plurality of driving MISFETs are of enhancement type.
Claim 8
Dependent Claim
80 words
A monolithic semiconductor integrated circuit as claimed in claim 2, 3, 4, or 5, characterized by further comprising an output driving MISFET for driving a display means connected externally to said monolithic semiconductor integration circuit, said output driving MISFET having a high breakdown voltage structure, the drain of said output driving MISFET being connected to said power source voltage supply terminal or to any other high voltage source, through a load resistance connected externally to said monolithic semiconductor integrated circuit.
Claim 9
Dependent Claim
45 words
A monolithic semiconductor integrated circuit as claimed in claim 1, 2, 3, 4, or 5, wherein auxiliary semiconductive regions of low impurity concentration are formed beneath the periphery of the gate electrode of said depletion type MISFET connected at the gate to said reference voltage.
Claim 10
Dependent Claim
33 words
A monolithic semiconductor integrated circuit as claimed in claim 1, 2, 3, 4, or 5, wherein said depletion type MISFET connected at its gate to said reference voltage is of offset gate type.
Claim 11
Dependent Claim
38 words
A monolithic semiconductor integrated circuit as claimed in claim 1, wherein the sources and drains of the driving MISFETs, the depletion type MISFET and the load MISFETs are formed in a substrate of the monolithic semiconductor integrated circuit.
Claim 12
Dependent Claim
53 words
A monolithic semiconductor integrated circuit as claimed in claim 2, wherein ##EQU15## where μ is the carrier mobility, e ox is the specific inductive capacity of the gate insulation film, tox is the thickness of the gate insulation film of the depletion type MISFET, and e o is the dielectric constant in vacuum.
Claim 13
Dependent Claim
76 words
A monolithic semiconductor integrated circuit as claimed in claim 6, characterized by further comprising an output driving MISFET for driving a display means connected externally to said monolithic semiconductor integration circuit, said output driving MISFET having a high breakdown voltage structure, the drain of said output driving MISFET being connected to said power source voltage supply terminal or to any other high voltage source, through a load resistance connected externally to said monolithic semiconductor integrated circuit.
Claim 14
Dependent Claim
40 words
A monolithic semiconductor integrated circuit as claimed in claim 6, wherein auxiliary semiconductive regions of low impurity concentration are formed beneath the periphery of the gate electrode of said depletion type MISFET connected at the gate to said reference voltage.
Claim 15
Dependent Claim
40 words
A monolithic semiconductor integrated circuit as claimed in claim 7, wherein auxiliary semiconductive regions of low impurity concentration are formed beneath the periphery of the gate electrode of said depletion type MISFET connected at the gate to said reference voltage.
Claim 16
Dependent Claim
28 words
A monolithic semiconductor integrated circuit as claimed in claim 6, wherein said depletion type MISFET connected at its gate to said reference voltage is of offset gate type.
Claim 17
Dependent Claim
28 words
A monolithic semiconductor integrated circuit as claimed in claim 7, wherein said depletion type MISFET connected at its gate to said reference voltage is of offset gate type.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-12-16 | 1984-06-16 | 1984-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-12-16 | 1988-06-16 | 1988-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-12-16 | 1992-06-16 | 1992-12-16 | $7700.00 | Window Closed / Lapsed |