Method of manufacturing an integrated circuit including an analog circuit and an I2 L circuit utilizing staged diffusion techniques

Claim 1

In a method of manufacturing a monolithic integrated circuit having at least one analog circuit portion, including a linear vertical NPN transistor, and at least one I 2 L circuit portion, including vertical NPN switching transistors, on a common semiconductor substrate wafer of P-type conductivity including the steps of diffusing N + -type conductivity regions into selected portions of the surface of a P-type conductivity substrate, which regions form buried layers in the finished integrated circuit; depositing an epitaxial layer of N-type conductivity on said surface of said substrate; forming deep P + -type conductivity regions which extend from the surface of said epitaxial layer down to said surface of said substrate to electrically isolate the individual circuit portions from one another; simultaneously diffusing P-type conductivity regions into selected portions of the surface of said epitaxial layer to form the injectors and the transistor base regions of the I 2 L circuits and the base regions of the linear transistors of the analog circuits; and producing N + -type conductivity regions in said base regions of the I 2 L circuit portions to form the collectors of the NPN switching transistors of the I 2 L circuits, and in the base regions of the analog circuit portions to form the emitters of the NPN linear transistors of the analog circuits; the improvement wherein said step of producing N + -type conductivity regions includes forming the N + -type conductivity emitter regions of at least one of the linear transistors of an analog circuit so that it is flat relative to the penetration depth of the N + -type conductivity collector regions of the I 2 L circuits.