Patent US3973073A successfully refreshed from Google Patents.
US4191602A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Liquid phase epitaxial method of making a high power, vertical channel field effect transistor
Assignee: General Electric Co
•
Filing: 1978-04-24
•
Granted: 1980-03-04
•
Expires: 1998-04-24
Abstract
Abstract A high power field effect transistor having a buried grid is fabricated by epitaxially growing from the liquid phase, on a lightly doped silicon substrate, a silicon layer heavily doped with the same conductivity type determining impurities. The substrate is thinned, and a grid region heavily doped with opposite conductivity type determining impurities is diffused into the substrate. An upper layer lightly doped with the same conductivity type determining impurities as those in the substrate is then grown epitaxially from the liquid phase atop the grid region, followed by diffusion of the same conductivity type determining impurities into the upper layer. The resulting structure exhibits relatively large source-to-drain conduction area in the grid region.
Inventors
- 👤 Bantval J. Baliga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 22:21
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D30/831; H10W; H10W20/00; H10W20/01; H10W20/021; H10P; H10P14/00; H10P14/20; H10P14/26; H10P14/263; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; Y; Y10; Y10S; Y10S148/00; Y10S148/088; Y10S438/00; Y10S438/977
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
157 words
The method of fabricating a high power field effect transistor comprising the steps of: depositing silicon heavily doped to one type conductivity from a melt of silicon heavily doped to said one type conductivity, epitaxially on a major surface of a monocrystalline silicon substrate lightly doped to said one type conductivity; forming a grid of silicon heavily doped to the opposite type conductivity at the exposed major surface of said substrate, said grid extending beneath the exposed major surface of said surface; epitaxially growing an upper layer of silicon atop said exposed major surface of said substrate, said upper layer of silicon being doped to said one type conductivity at a level intermediate that of said substrate and that of said silicon deposited epitaxially from said melt; and forming, at the exposed major surface of said upper layer, a heavily doped region of said one type conductivity extending into said upper layer a fraction of its depth.
Claim 2
Independent Claim
157 words
The method of fabricating a high power field effect transistor comprising the steps of: depositing silicon heavily doped to one type conductivity from a melt of silicon heavily doped to said one type conductivity, epitaxially on a major surface of a monocrystalline silicon substrate lightly doped to said one type conductivity; forming a grid of silicon heavily doped to the opposite type conductivity at the exposed major surface of said substrate, said grid extending beneath the exposed major surface of said surface; epitaxially growing an upper layer of silicon atop said exposed major surface of said substrate, said upper layer of silicon being doped to said one type conductivity at a level intermediate that of said substrate and that of said silicon deposited epitaxially from said melt; and forming, at the exposed major surface of said upper layer, a heavily doped region of said one type conductivity extending into said upper layer a fraction of its depth.
Claim 3
Dependent Claim
27 words
The method of claim 1 including the step of thinning said substrate to a desired thickness after depositing silicon epitaxially thereon and prior to forming said grid.
Claim 4
Dependent Claim
23 words
The method of claim 2 wherein the step of thinning said substrate comprises lapping and polishing said exposed major surface of said substrate.
Claim 5
Dependent Claim
23 words
The method of claim 2 wherein the step of thinning said substrate comprises chemical etching of said exposed major surface of said substrate.
Claim 6
Dependent Claim
33 words
The method of claim 1 wherein the step of forming a grid of silicon comprises diffusing opposite conductivity type determining impurities into said exposed major surface of said substrate in a grid pattern.
Claim 7
Dependent Claim
34 words
The method of claim 1 wherein the step of forming a grid of silicon comprises ion implanting opposite conductivity type determining impurities into said exposed major surface of said substrate in a grid pattern.
Claim 8
Dependent Claim
33 words
The method of claim 2 wherein the step of forming a grid of silicon comprises diffusing opposite conductivity type determining impurities into said exposed major surface of said substrate in a grid pattern.
Claim 9
Dependent Claim
34 words
The method of claim 2 wherein the step of forming a grid of silicon comprises ion implanting opposite conductivity type determining impurities into said exposed major surface of said substrate in a grid pattern.
Claim 10
Dependent Claim
46 words
The method of claim 1 wherein the step of forming at said exposed major surface of said upper layer a heavily doped region of said one type conductivity comprises diffusing impurities of the one conductivity determining type into said exposed major surface of said upper layer.
Claim 11
Dependent Claim
46 words
The method of claim 5 wherein the step of forming at said exposed major surface of said upper layer a heavily doped region of said one type conductivity comprises diffusing impurities of the one conductivity determining type into said exposed major surface of said upper layer.
Claim 12
Dependent Claim
46 words
The method of claim 6 wherein the step of forming at said exposed major surface of said upper layer a heavily doped region of said one type conductivity comprises diffusing impurities of the one conductivity determining type into said exposed major surface of said upper layer.
Claim 13
Dependent Claim
46 words
The method of claim 7 wherein the step of forming at said exposed major surface of said upper layer a heavily doped region of said one type conductivity comprises diffusing impurities of the one conductivity determining type into said exposed major surface of said upper layer.
Claim 14
Dependent Claim
46 words
The method of claim 8 wherein the step of forming at said exposed major surface of said upper layer a heavily doped region of said one type conductivity comprises diffusing impurities of the one conductivity determining type into said exposed major surface of said upper layer.
References Cited (Backward Citations)
US3025438A
Cited
US3274461A
Cited
US3252003A
Cited
US3381187A
Cited
US3465216A
Cited
US4107725A
Cited
US4036672A
Cited
US4086611A
Cited
US4132996A
Cited
US4128440A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-03-04 | 1983-09-03 | 1984-03-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-03-04 | 1987-09-03 | 1988-03-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-03-04 | 1991-09-03 | 1992-03-04 | $7700.00 | Window Closed / Lapsed |