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US4128440A Expired / Lapsed US ⏱️ 0.0 years remaining

Liquid phase epitaxial method of covering buried regions for devices

Assignee: General Electric Co
•
Filing: 1978-04-24
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Granted: 1978-12-05
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Expires: 1998-04-24
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Abstract

Abstract Buried regions of predetermined conductivity in silicon semiconductor devices are formed with substantially no out diffusion from the substrate and buried region, and with substantially no lateral autodoping, by diffusing the region into a monocrystalline silicon wafer doped to one conductivity type, and depositing silicon from a melt supersaturated with silicon and containing conductivity type determining impurities, epitaxially atop the wafer. The device is completed by performing conventional diffusion of conductivity type determining impurities into the epitaxially deposited layer.

Inventors

  • 👤 Bantval J. Baliga

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 20:28
CPC Classifications
H; H10; H10W; H10W15/00; H10P; H10P14/00; H10P14/20; H10P14/26; H10P14/263; H10P14/265; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/2926; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3438; H10P14/3441; H10W15/01

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 78 words
The method of forming a buried region in a monocrystalline silicon wafer, said buried region being of predetermined conductivity type, comprising the steps of: forming a region of said predetermined conductivity type within said monocrystalline silicon wafer; and depositing silicon from a melt of conductivity type determining impurities supersaturated with silicon, epitaxially atop said wafer and said region of predetermined conductivity type to form a silicon layer thereon of conductivity type determined by said impurities in said melt.
Claim 2
Independent Claim 78 words
The method of forming a buried region in a monocrystalline silicon wafer, said buried region being of predetermined conductivity type, comprising the steps of: forming a region of said predetermined conductivity type within said monocrystalline silicon wafer; and depositing silicon from a melt of conductivity type determining impurities supersaturated with silicon, epitaxially atop said wafer and said region of predetermined conductivity type to form a silicon layer thereon of conductivity type determined by said impurities in said melt.
Claim 3
Dependent Claim 35 words
The method of claim 1 including the additional step of forming regions of predetermined conductivity types in contact with said silicon deposited epitaxially atop said wafer in order to produce a completed semiconductor electronic device.
Claim 4
Dependent Claim 32 words
The method of claim 1 wherein the step of forming said region of predetermined conductivity type in said monocrystalline silicon wafer comprises diffusing impurities into said wafer to a predetermined surface concentration.
Claim 5
Dependent Claim 35 words
The method of claim 3 including the additional step of forming regions of predetermined conductivity types in contact with said silicon deposited epitaxially atop said wafer in order to produce a completed semiconductor electronic device.
Claim 6
Independent Claim 120 words
The method of forming a buried region of predetermined resistivity in a silicon semiconductor electronic device, comprising the steps of: diffusing, into a monocrystalline silicon wafer doped to one conductivity type by a predetermined concentration of specific impurities therein, other impurities to a predetermined concentration therein to form a region of opposite conductivity type in said wafer; depositing silicon from a melt of conductivity type determining impurities supersaturated with silicon, epitaxially atop said wafer and said region of opposite conductivity type to form a layer of silicon of said opposite conductivity type; and forming regions of predetermined conductivity types in said silicon deposited epitaxially atop said wafer in order to provide the remaining necessary component regions of said electronic device.
Claim 7
Independent Claim 120 words
The method of forming a buried region of predetermined resistivity in a silicon semiconductor electronic device, comprising the steps of: diffusing, into a monocrystalline silicon wafer doped to one conductivity type by a predetermined concentration of specific impurities therein, other impurities to a predetermined concentration therein to form a region of opposite conductivity type in said wafer; depositing silicon from a melt of conductivity type determining impurities supersaturated with silicon, epitaxially atop said wafer and said region of opposite conductivity type to form a layer of silicon of said opposite conductivity type; and forming regions of predetermined conductivity types in said silicon deposited epitaxially atop said wafer in order to provide the remaining necessary component regions of said electronic device.
Claim 8
Dependent Claim 69 words
The method of claim 5 wherein said step of depositing silicon from a melt of conductivity type determining impurities comprises dipping said wafer into said melt at a time when said melt is heated to a temperature at which it is supersaturated with silicon, and reducing the temperature of said melt at a predetermined rate for a predetermined period of time while said wafer is immersed in said melt.
Claim 9
Dependent Claim 24 words
The method of claim 6 wherein said melt comprises tin at a temperature of about 950° C. when said melt is supersaturated with silicon.
Claim 10
Dependent Claim 33 words
The method of claim 7 wherein said melt is saturated with silicon of n type conductivity at a temperature in the range of about 5° C. to 50° C. above the growth temperature.
Claim 11
Dependent Claim 33 words
The method of claim 7 wherein said melt is saturated with silicon of p type conductivity at a temperature in the range of about 5° C. to 50° C. above the growth temperature.
Claim 12
Dependent Claim 24 words
The method of claim 6 wherein said melt is supersaturated with silicon of n type conductivity prior to dipping said wafer into said melt.
Claim 13
Dependent Claim 24 words
The method of claim 6 wherein said melt is supersaturated with silicon of p type conductivity prior to dipping said wafer into said melt.
Claim 14
Dependent Claim 24 words
The method of claim 6 including the step of heating said wafer to said melt temperature prior to dipping said wafer into said melt.
Claim 15
Dependent Claim 23 words
The method of claim 12 wherein said melt comprises tin at a temperature of approximately 950° C. when said wafer is dipped therein.
Claim 16
Dependent Claim 19 words
The method of claim 5 including the step of maintaining said melt and said wafer in a reducing atmosphere.
Claim 17
Dependent Claim 69 words
The method of claim 14 wherein the step of depositing silicon from a melt of conductivity type determining impurities comprises dipping said wafer into said melt at a time when said melt is heated to a temperature at which it is supersaturated with silicon, and reducing the temperature of said melt at a predetermined rate for a predetermined period of time while said wafer is immersed in said melt.
Claim 18
Dependent Claim 24 words
The method of claim 15 wherein said melt comprises tin at a temperature of approximately 950° C. when said melt is supersaturated with silicon.
Claim 19
Dependent Claim 24 words
The method of claim 15 including the step of heating said wafer to said melt temperature prior to dipping said wafer into said melt.

References Cited (Backward Citations)

US3810794A Cited
US3994755A Cited
US3984262A Cited
US4053334A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1981-12-04 1982-06-05 1982-12-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1985-12-04 1986-06-05 1986-12-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1989-12-04 1990-06-05 1990-12-05 $7700.00 Window Closed / Lapsed

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