Patent US4187439A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4187439A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog control of pulse rates

Assignee: Honeywell Inc
•
Filing: 1978-02-21
•
Granted: 1980-02-05
•
Expires: 1998-02-21
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract Apparatus for providing pulses at a rate limited by an input analog control signal. The analog control signal is compared to a ramp voltage, and an output pulse is generated when the ramp voltage reaches the control voltage level.

Inventors

  • 👤 Andrew M. Vesel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 20:25
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/00006; H03K7/00; H03K7/06

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 241 words
A pulse rate controller for receiving input pulses and generating output pulses with an output pulse rate limited by the amplitude of an analog control signal, said controller comprising: first input means for receiving input pulses; second input means for receiving an analog control signal; a voltage ramp generator for generating a voltage ramp signal; a voltage comparison circuit having a first input terminal connected to said second input means and a second input terminal connected to said voltage ramp generator and assuming a first comparison condition when the analog control signal is of a greater voltage than is the voltage ramp signal and a second comparison condition when the analog control signal is of a lesser voltage than is the voltage ramp signal; circuit means connected to said first input means, to said voltage ramp generator, and to said voltage comparison circuit; said circuit means, in response to said voltage comparison circuit assuming said second comparison condition, assuming a first state in which said circuit means disables and discharges said voltage ramp generator to prevent generation of a voltage ramp signal; said circuit means in response to an input pulse received at said first input means assuming a second state in which said circuit means enables said voltage ramp generator to generate a voltage ramp signal; and pulse generating means connected to said circuit means for generating an output pulse in response to said circuit means assuming said second state.
Claim 2
Dependent Claim 241 words
A pulse rate controller for receiving input pulses and generating output pulses with an output pulse rate limited by the amplitude of an analog control signal, said controller comprising: first input means for receiving input pulses; second input means for receiving an analog control signal; a voltage ramp generator for generating a voltage ramp signal; a voltage comparison circuit having a first input terminal connected to said second input means and a second input terminal connected to said voltage ramp generator and assuming a first comparison condition when the analog control signal is of a greater voltage than is the voltage ramp signal and a second comparison condition when the analog control signal is of a lesser voltage than is the voltage ramp signal; circuit means connected to said first input means, to said voltage ramp generator, and to said voltage comparison circuit; said circuit means, in response to said voltage comparison circuit assuming said second comparison condition, assuming a first state in which said circuit means disables and discharges said voltage ramp generator to prevent generation of a voltage ramp signal; said circuit means in response to an input pulse received at said first input means assuming a second state in which said circuit means enables said voltage ramp generator to generate a voltage ramp signal; and pulse generating means connected to said circuit means for generating an output pulse in response to said circuit means assuming said second state.
Claim 3
Dependent Claim 25 words
The pulse rate controller of claim 1 wherein said voltage ramp generator comprises a capacitor and substantially constant current source means for charging said capacitor.

References Cited (Backward Citations)

US3484624A Cited
US3577012A Cited
US3742257A Cited
US3968447A Cited
US3883756A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-02-04 1983-08-06 1984-02-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-02-04 1987-08-06 1988-02-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-02-04 1991-08-06 1992-02-05 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag