US3577012A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit for controlling frequency with voltage
Assignee: Allen Bradley Co LLC
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Filing: 1968-10-03
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Granted: 1971-05-04
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Expires: 1988-10-03
Abstract
Abstract A circuit for providing output pulses at a frequency determined by a variable DC control voltage. The circuit includes a gate to which an oscillator output is applied. The gate is controlled by the output of a comparator circuit which compares the amplitude of a ramp signal with the DC control voltage. The ramp signal is generated at a frequency which is a subharmonic of the oscillator frequency. The gate passes the oscillator output pulses as long as the ramp signal amplitude is less than the DC control voltage.
Inventors
- 👤 Ernst H Dummermuth
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 12:08
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/023; H03K3/0231; H03K3/64
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
117 words
A frequency control circuit for use with an oscillator producing output pulses at a predetermined frequency, said circuit comprising: a gate, said gate having an enabling input terminal and an input terminal adapted to receive said oscillator output pulses; means responsive to said oscillator output for repetitively generating a voltage having a changing amplitude waveform, the repetitive frequency of said waveform being lower than the frequency of said oscillator output pulses; means for selecting a predetermined amplitude level on each changing amplitude waveform; and means for enabling said gate to pass said oscillator output pulses over an interval determined by the time required for the amplitude of said changing amplitude waveform to reach the amplitude level selected.
Claim 2
Dependent Claim
84 words
A circuit as recited in claim 2 wherein said means for enabling said gate comprises a voltage comparator having a first and a second input; means for applying said changing amplitude waveform to said first input; means for applying a DC control voltage having a desired level to said second input; and means for applying the output of said voltage comparator to said gate for enabling said gate until the amplitude of said changing amplitude waveform exceeds the amplitude of said DC control voltage.
Claim 3
Dependent Claim
51 words
A circuit as recited in claim 2 wherein said means for repetitively generating a voltage having a changing amplitude waveform includes frequency divider means responsive to said oscillator output pulses; a capacitor; means for charging said capacitor; and means for discharging said capacitor responsive to the output from said frequency divider.
Claim 4
Dependent Claim
147 words
A frequency control circuit comprising: an oscillator providing output pulses at a predetermined frequency; frequency-dividing means to which the output of said oscillator is applied; means for generating a sawtooth voltage waveform at a frequency determined by the output of said frequency-dividing means; a voltage comparator having first and second input terminals and an output terminal; means for generating a control voltage having a desired amplitude; means for applying said sawtooth voltage and said control voltage to said respective comparator first and seconD input terminals; a gate having first and second input terminals; means for applying said oscillator output to said gate first input terminal; and means for coupling said voltage comparator output terminal to said gate second input terminal to enable said gate to pass pulses from said oscillator so long as the amplitude of said sawtooth voltage waveform is less than said control voltage amplitude.
Claim 5
Dependent Claim
135 words
A frequency control circuit as recited in claim 5 wherein said means for generating a sawtooth voltage waveform includes a capacitor having first and second terminals; means for charging said capacitor including a first transistor having base, emitter and collector electrodes; means connecting said collector electrode to a first terminal of said capacitor; means for applying an operating potential between said emitter electrode and said second terminal of said capacitor; means for selectively biasing said first transistor base electrode to render it conductive; means for discharging said capacitor including a second transistor having base, emitter and collector electrodes; means for connecting said second transistor collector and emitter electrodes respectively to said first and second electrodes of said capacitor; and means for applying the output of said frequency dividing means to said second transistor base electrode.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1974-05-03 | 1974-11-02 | 1975-05-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1978-05-03 | 1978-11-02 | 1979-05-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1982-05-03 | 1982-11-02 | 1983-05-04 | $7700.00 | Window Closed / Lapsed |