US4173765A — V-MOS imaging array

Claim 1

Independent Claim 70 words

An improved solid state image sensing element formed as an MOS transistor on a bulk of semiconductor material, wherein the improvement comprises: said bulk having a surface with a depression therein, said depression having a generally sloping side; and said MOS transistor being formed on the sloping side of said depression, thereby to provide an image sensing element of a size that is economical of space on the bulk surface.

Claim 2

Dependent Claim 70 words

An improved solid state image sensing element formed as an MOS transistor on a bulk of semiconductor material, wherein the improvement comprises: said bulk having a surface with a depression therein, said depression having a generally sloping side; and said MOS transistor being formed on the sloping side of said depression, thereby to provide an image sensing element of a size that is economical of space on the bulk surface.

Claim 3

Dependent Claim 74 words

The image sensing element claimed in claim 1, wherein said MOS transistor includes a source, a drain, and a gate, said source being disposed near said surface adjacent said depression and being adapted to be exposed to light, said drain being disposed adjacent said depression, spaced from said source and buried in said bulk, and said gate being disposed on said sloping side of said depression and extending between said source and said drain.

Claim 4

Dependent Claim 34 words

In combination with the image sensing element claimed in claim 1, a second image sensing element, the source of the first image sensing element being adjacent the gate of said second image sensing element.

Claim 5

Dependent Claim 165 words

A solid state image sensing element, comprising: a bulk of semiconductor material of a first dopant type, said bulk having a surface with a depression formed therein, said depression having a generally sloping side; a first region of a second dopant type disposed within said bulk adjacent said depression, said first region being adapted to be exposed to light, the junction between said first region and said bulk forming a photodiode, whereby when said first region is exposed to light, a charge proportional to the quantity of light may be generated and stored on the junction capacitance of said photodiode; a second region of said second dopant type disposed within said bulk adjacent said depression and spaced from said first region; and a gate, including a gate electrode, disposed on said generally sloping side of said depression, said gate extending between said first and second regions, whereby, when said gate electrode is electrically activated, said charge is transferred from said photodiode to said second region.

Claim 6

Dependent Claim 165 words

A solid state image sensing element, comprising: a bulk of semiconductor material of a first dopant type, said bulk having a surface with a depression formed therein, said depression having a generally sloping side; a first region of a second dopant type disposed within said bulk adjacent said depression, said first region being adapted to be exposed to light, the junction between said first region and said bulk forming a photodiode, whereby when said first region is exposed to light, a charge proportional to the quantity of light may be generated and stored on the junction capacitance of said photodiode; a second region of said second dopant type disposed within said bulk adjacent said depression and spaced from said first region; and a gate, including a gate electrode, disposed on said generally sloping side of said depression, said gate extending between said first and second regions, whereby, when said gate electrode is electrically activated, said charge is transferred from said photodiode to said second region.

Claim 7

Dependent Claim 19 words

The invention claimed in claim 4, wherein said first and second regions and said gate comprise a V-MOS transistor.

Claim 8

Dependent Claim 14 words

The invention claimed in claim 4, wherein said depression has a generally V-shaped cross-section.

Claim 9

Dependent Claim 15 words

The invention claimed in claim 4, wherein said second region is buried in said bulk.

Claim 10

Dependent Claim 102 words

In an improved solid state image sensor of the type comprised of a two dimensional array of individual picture sensing elements formed respectively as individual MOS transistors on a bulk of semiconductor material, the improvement wherein: said bulk has a surface formed with depressions therein, said depressions having generally sloping sides; and said MOS transistors are formed on the sloping sides of said depressions, whereby an economy of bulk surface area is achieved thereby increasing the number of individual picture sensing elements that may be formed in an array of a given physical size thereby to increase the resolution of the array.

Claim 11

Dependent Claim 102 words

In an improved solid state image sensor of the type comprised of a two dimensional array of individual picture sensing elements formed respectively as individual MOS transistors on a bulk of semiconductor material, the improvement wherein: said bulk has a surface formed with depressions therein, said depressions having generally sloping sides; and said MOS transistors are formed on the sloping sides of said depressions, whereby an economy of bulk surface area is achieved thereby increasing the number of individual picture sensing elements that may be formed in an array of a given physical size thereby to increase the resolution of the array.

Claim 12

Dependent Claim 70 words

The image sensing array claimed in claim 8 wherein said transistors include, respectively, a source, a drain, and a gate having a gate electrode, the sources of said transistors being disposed to receive light, and wherein said array further comprises means for electrically interconnecting the drains of some transistors aligned in a first dimension and means for electrically interconnecting the gate electrodes of some transistors aligned in a second dimension.

Claim 13

Dependent Claim 24 words

The image sensing array claimed in claim 9 wherein said drains and said means for electrically interconnecting said drains are buried in said bulk.

Claim 14

Dependent Claim 41 words

The image sensing array claimed in claim 9 wherein said transistors include, respectively, a source, a drain, and a gate having a gate electrode, the source of one transistor being adjacent the gate of another transistor aligned in the first dimension.

Claim 15

Dependent Claim 130 words

In a solid state image sensing array, a picture sensing element comprising: a substrate of semiconductor material which is largely of a preselected first impurity type, said substrate having an upper surface with a recess therein; a first region of semiconductor material adjacent said recess within said substrate and being of an impurity type opposite to that of said first impurity type; a second region of semiconductor material adjacent said recess within said substrate and being of the same impurity type as and spaced from said first region, said second region being arranged to be exposed to a portion of an image to be sensed; and a gate, including a conductive gate electrode, located within the recess in said substrate, said gate electrode extending between said first and second regions.

Claim 16

Dependent Claim 130 words

In a solid state image sensing array, a picture sensing element comprising: a substrate of semiconductor material which is largely of a preselected first impurity type, said substrate having an upper surface with a recess therein; a first region of semiconductor material adjacent said recess within said substrate and being of an impurity type opposite to that of said first impurity type; a second region of semiconductor material adjacent said recess within said substrate and being of the same impurity type as and spaced from said first region, said second region being arranged to be exposed to a portion of an image to be sensed; and a gate, including a conductive gate electrode, located within the recess in said substrate, said gate electrode extending between said first and second regions.

Claim 17

Dependent Claim 20 words

The invention as claimed in claim 12, wherein said first and second regions and said gate comprise a V-MOS transistor.

Claim 18

Dependent Claim 16 words

The invention as claimed in claim 12, wherein said recess is shaped like an inverted pyramid.

Claim 19

Dependent Claim 48 words

The invention as claimed in claim 12, further comprising a first layer of semiconductor material disposed over said second region and a second layer of semiconductor material disposed beneath said second region, said layers being of the same impurity type as said substrate and being more heavily doped.

Claim 20

Dependent Claim 19 words

The invention as claimed in claim 12, further comprising an infra-red filter over said substrate and said second region.

Claim 21

Dependent Claim 26 words

The invention as claimed in claim 12, wherein said first region is extended to form a conductive path adapted to be connected to an output means.

Claim 22

Dependent Claim 26 words

The invention as claimed in claim 12, wherein said gate electrode is extended to form a path adapted to be connected to a gating signal means.

Claim 23

Dependent Claim 108 words

A picture sensing element for a solid state image sensing device, comprising: a substrate of n-type semiconductor material, said substrate having an upper surface with a depression therein; a first region of p-type semiconductor material buried within said substrate adjacent said depression; a second region of p-type semiconductor material within said substrate adjacent said depression and spaced from said first region, said second region being disposed to be exposed to light; a gate, including a conductive gate electrode, located within the depression in said surface, said gate extending between said first and second regions; a nonconductive layer covering said substrate and said second region and surrounding said depression.

Claim 24

Dependent Claim 108 words

A picture sensing element for a solid state image sensing device, comprising: a substrate of n-type semiconductor material, said substrate having an upper surface with a depression therein; a first region of p-type semiconductor material buried within said substrate adjacent said depression; a second region of p-type semiconductor material within said substrate adjacent said depression and spaced from said first region, said second region being disposed to be exposed to light; a gate, including a conductive gate electrode, located within the depression in said surface, said gate extending between said first and second regions; a nonconductive layer covering said substrate and said second region and surrounding said depression.

Claim 25

Dependent Claim 24 words

The picture sensing element according to claim 19, including a layer of n + -type semiconductor material between said substrate and said nonconductive layer.

Claim 26

Dependent Claim 34 words

The picture sensing element according to claim 19, wherein said depression has an inverted pyramidal configuration, said first region forming a buried drain and said second region forming a source of a V-MOS transistor.

Claim 27

Dependent Claim 108 words

A picture sensing element for a solid state image sensing device, comprising: a substrate of p-type semiconductor material, said substrate having an upper surface with a depression therein; a first region of n-type semiconductor material buried within said substrate adjacent said depression; a second region of n-type semiconductor material within said substrate adjacent said depression and spaced from said first region, said second region being disposed to be exposed to light; a gate, including a conductive gate electrode, located within the depression in said surface, said gate extending between said first and second regions; a nonconductive layer covering said substrate and said second region and surrounding said depression.

Claim 28

Dependent Claim 108 words

A picture sensing element for a solid state image sensing device, comprising: a substrate of p-type semiconductor material, said substrate having an upper surface with a depression therein; a first region of n-type semiconductor material buried within said substrate adjacent said depression; a second region of n-type semiconductor material within said substrate adjacent said depression and spaced from said first region, said second region being disposed to be exposed to light; a gate, including a conductive gate electrode, located within the depression in said surface, said gate extending between said first and second regions; a nonconductive layer covering said substrate and said second region and surrounding said depression.

Claim 29

Dependent Claim 24 words

The picture sensing element according to claim 22, including a layer of p + -type semiconductor material between said substrate and said nonconductive layer.

Claim 30

Dependent Claim 34 words

The picture sensing element according to claim 22, wherein said depression has an inverted pyramidal configuration, said first region forming a buried drain and said second region forming a source of a V-MOS transistor.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1982-11-05	1983-05-07	1983-11-06	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1986-11-05	1987-05-07	1987-11-06	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1990-11-05	1991-05-07	1991-11-06	$7700.00	Window Closed / Lapsed

V-MOS imaging array

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag