Dynamic random access memory using MOS FETs and method for manufacturing same

Claim 1

A dynamic Random Access Memory using MOS FETS comprising: a semiconductor substrate of one conductivity type; a pair of data lines each comprising an impurity diffusion layer of an opposite conductivity type and formed in the semiconductor substrate; a pair of co-linear adjacent memory cells located between the data lines, each cell comprising a capacitor and a MOS FET formed adjacent to the capacitor for reading out and writing in information, said pair of memory cells comprising a first insulating film formed on said substrate, said first film having a pair of thin co-linear end portions separated by a thick portion; a first conductor formed on said first insulating film, said first conductor having a pair of co-linear end portions lying on said thin portions of said first insulating film, each of said end portions of said first conductor serving as one electrode of a capacitor; a second insulating film formed on said first conductor, said second insulating film having a thin portion formed on said end portion of said first conductor; a second conductor formed on said first and second insulating films and bridging said insulated first conductor, said second conductor having co-linear end portions disposed on said thin portion of said first insulating film and serving as the gate electrodes of said pair of adjacent memory cells, said second conductor having a central portion bridging said first conductor and insulated therefrom by said second film; the MOS FET having two current flow electrodes and said gate electrode, one of the current flow electrodes being coupled to one of the pair of data lines; and an address line formed above the memory cells and connected to the second conductor by a single contact hole, said contact hole located at said central portion of said second conductor between the co-linear adjacent memory cells.