US4128832A — Combined encoder/decoder

Claim 1

Independent Claim 151 words

A transcoder comprising: a first and a second transcoder input adapted to receive a first and a second type of modulation signal, respectively; a first and a second transcoder output; an interpolator having an input and an output, the output of said interpolator being operatively connected to said first transcoder output; a comparator having at least two inputs and one output, one of said comparator inputs operatively connected to the output of said interpolator, said comparator output operatively connected to said second transcoder output; an integrator having an input and an output, the output of said integrator being operatively connected to a second input of said comparator; first means for selectively connecting the input of said interpolator to either said first transcoder input or to said integrator output; and second means for selectively connecting the input of said integrator to either said second transcoder input or to said second transcoder output.

Claim 2

Dependent Claim 151 words

A transcoder comprising: a first and a second transcoder input adapted to receive a first and a second type of modulation signal, respectively; a first and a second transcoder output; an interpolator having an input and an output, the output of said interpolator being operatively connected to said first transcoder output; a comparator having at least two inputs and one output, one of said comparator inputs operatively connected to the output of said interpolator, said comparator output operatively connected to said second transcoder output; an integrator having an input and an output, the output of said integrator being operatively connected to a second input of said comparator; first means for selectively connecting the input of said interpolator to either said first transcoder input or to said integrator output; and second means for selectively connecting the input of said integrator to either said second transcoder input or to said second transcoder output.

Claim 3

Dependent Claim 51 words

A transcoder as specified in claim 1, wherein said interpolator comprises a first shift register, a second shift register, and adder for adding the output from said second shift register and the input to said interpolator and a divider connected in series between the input and the output of said interpolator.

Claim 4

Dependent Claim 56 words

A transcoder as specified in claim 2, wherein said integrator comprises an inverter, a second adder, a third shift register, and a fourth shift register connected in series between said first and said second means, said adder being connected to said fourth shift register so as to add its contents to the output of said inverter.

Claim 5

Dependent Claim 39 words

A transcoder as specified in claim 3, wherein said first transcoder output is comprised of a fifth shift register having its input operatively connected to said divider with the output from said fifth shift register being a modulation signal.

Claim 6

Dependent Claim 42 words

A transcoder as specified in claim 4, wherein said second transcoder output is comprised of a sixth shift register having its input operatively connected to the output of said comparator, with the output from said sixth shift register being another modulation signal.

Claim 7

Dependent Claim 117 words

In combination with the transcoder as specified in claim 5: (a) first clock means connected to said first means, and to said second means to synchronously control said first and said second means at a predetermined rate; (b) a second clock means connected to said first, second, third, and fourth shift registers to shift said registers at twice the rate of said first clock means; (c) third clock means connected to said fifth shift register to shift said fifth register at half the rate of said first clock means; and (d) said first clock means also connected to said sixth shift register to shift said sixth shift register at said predetermined rate of said first clock means.

Claim 8

Dependent Claim 111 words

A combined encoder and decoder for converting between pulse code modulation (PCM) signals and differential code modulation (DM) signals comprising: (a) a PCM input; (b) a PCM output; (c) a DM input; (d) a DM output; (e) an interpolator connected to provide PCM signals to said PCM output; (f) an integrator; (g) a comparator connected to receive PCM signals from said interpolator and said integrator and connected to provide DM signals to said DM output; (h) first means for periodically alternatively connecting said PCM input and integrator to said interpolator; and (i) second means synchronized to said first means for periodically alternatively connecting said DM input and comparator to said integrator.

Claim 9

Dependent Claim 111 words

A combined encoder and decoder for converting between pulse code modulation (PCM) signals and differential code modulation (DM) signals comprising: (a) a PCM input; (b) a PCM output; (c) a DM input; (d) a DM output; (e) an interpolator connected to provide PCM signals to said PCM output; (f) an integrator; (g) a comparator connected to receive PCM signals from said interpolator and said integrator and connected to provide DM signals to said DM output; (h) first means for periodically alternatively connecting said PCM input and integrator to said interpolator; and (i) second means synchronized to said first means for periodically alternatively connecting said DM input and comparator to said integrator.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1981-12-04	1982-06-05	1982-12-05	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1985-12-04	1986-06-05	1986-12-05	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1989-12-04	1990-06-05	1990-12-05	$7700.00	Window Closed / Lapsed

Combined encoder/decoder

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