Patent US4114255A successfully refreshed from Google Patents.
US4114255A
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Floating gate storage device and method of fabrication
Assignee: Intel Corp
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Filing: 1977-05-02
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Granted: 1978-09-19
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Expires: 1997-05-02
Abstract
Abstract A floating gate storage device in which the channel is maintained at a first doping concentration to provide a low threshold voltage and preselected portions or regions along the sides of the channel are maintained at a second higher doping concentration to enhance programming of the device. These regions are formed as part of the "front-end" processing of the substrate while forming channel stops, thus no additional processing is required.
Inventors
- 👤 Phillip J. Salsbury
- 👤 George Perlegos
- 👤 William L. Morgan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 08:20
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
133 words
In a process for fabricating a floating gate memory device on a silicon substrate of a first conductivity type, the steps of: defining a channel area on said substrate with a masking means which includes silicon nitride; subjecting said substrate to a dopant of said first conductivity type so as to form first doped regions adjacent to first opposite sides of said channel area; forming an oxide layer on said substrate abutting said masking means; removing said masking means; forming a floating gate insulated from said substrate above said channel area; forming a source and drain region of a second conductivity type at second opposite sides of said channel area; whereby regions along said first sides of said gate are doped, thereby permitting charge to be more easily injected into said floating gate.
Claim 2
Dependent Claim
133 words
In a process for fabricating a floating gate memory device on a silicon substrate of a first conductivity type, the steps of: defining a channel area on said substrate with a masking means which includes silicon nitride; subjecting said substrate to a dopant of said first conductivity type so as to form first doped regions adjacent to first opposite sides of said channel area; forming an oxide layer on said substrate abutting said masking means; removing said masking means; forming a floating gate insulated from said substrate above said channel area; forming a source and drain region of a second conductivity type at second opposite sides of said channel area; whereby regions along said first sides of said gate are doped, thereby permitting charge to be more easily injected into said floating gate.
Claim 3
Dependent Claim
13 words
The process defined by claim 1 wherein said substrate comprises a p-type material.
Claim 4
Dependent Claim
21 words
The process defined by claim 2 wherein said step of subjecting said substrate to a dopant comprises ion implantation with boron.
Claim 5
Dependent Claim
35 words
The process defined by claim 3 including a driver-step for driving said implanted boron into said substrate so as to cause said boron to be diffused into said first opposite sides of said channel area.
Claim 6
Dependent Claim
35 words
The process defined by claim 4 including a second doping step which dopes said channel area after removing at least a portion of said masking means and prior to the formation of said floating gate.
Claim 7
Dependent Claim
18 words
The process defined by claim 5 wherein said second doping step comprises boron implantation through an oxide layer.
Claim 8
Dependent Claim
146 words
In a process for fabricating a floating gate memory device on a p-type silicon substrate, an improvement in said process for forming p-type regions along first opposite sides of a channel area in order to permit easier programming of said gate from said channel area, comprising the steps of: defining said channel area on said substrate with a mask which includes a layer of silicon nitride; subjecting said substrate to boron implantation so as to form said p-type regions along said first opposite sides of said channel area; forming a field oxide layer on said substrate abutting said mask; removing at least a portion of said mask; forming said floating gate at said channel area; forming source and drain regions along second opposite sides of said channel area; whereby regions which enable easier programming of said floating gate are formed in alignment with said floating gate.
Claim 9
Dependent Claim
146 words
In a process for fabricating a floating gate memory device on a p-type silicon substrate, an improvement in said process for forming p-type regions along first opposite sides of a channel area in order to permit easier programming of said gate from said channel area, comprising the steps of: defining said channel area on said substrate with a mask which includes a layer of silicon nitride; subjecting said substrate to boron implantation so as to form said p-type regions along said first opposite sides of said channel area; forming a field oxide layer on said substrate abutting said mask; removing at least a portion of said mask; forming said floating gate at said channel area; forming source and drain regions along second opposite sides of said channel area; whereby regions which enable easier programming of said floating gate are formed in alignment with said floating gate.
Claim 10
Dependent Claim
14 words
The process defined by claim 7 wherein said mask includes a gate oxide layer.
Claim 11
Dependent Claim
26 words
The process defined by claim 8 including boron implanting said channel area through said gate oxide layer after said removal of said portion of said mask.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-09-18 | 1982-03-20 | 1982-09-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-09-18 | 1986-03-20 | 1986-09-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-09-18 | 1990-03-20 | 1990-09-19 | $7700.00 | Window Closed / Lapsed |