Integrated circuit data handling apparatus for a data processing system, having a plurality of modes of operation

Claim 1

Data handling apparatus constructed as an integrated circuit on a single substrate for use in a data processing system including at least two control units and said data handling apparatus comprising: a plurality of input/output gates for connecting peripheral units in said data processing system to said data handling apparatus for receiving data from said system in said data handling apparatus and for supplying the data to said data processing system, storage means having storage locations for, at least temporarily, storing data to be processed, said storage locations forming a part of a data path between portions of said data processing system through said input/output gates, input counter means for generating addresses indicating storage locations in said storage means to which data from said input/output gates is to be coupled, output counter means for generating addresses indicating storage locations in said storage means from which data is to be coupled to said input/output gates, mode switching means in said input and output counter means for selecting, respectively, one of a plurality of modes of operation for said input and output counter means, said modes including one in which data is stored in and emitted from individual storage locations, another in which blocks of data are stored in and emitted from groups of said storage locations, and a third in which said input and output counter means receive and register externally supplied addresses for selecting said storage locations and operational register means for receiving and storing control data supplied by a control unit of said data processing system for operating said mode switching means to select and operate according to one of said modes of operation, said input/output gates comprising an input amplifier, an output bistable circuit connected in parallel therewith and electronic coupling means for making operative the amplifier or the bistable circuit, responsive to the content of said operational register means, said input/output gates each being operable upon receipt of appropriate control data to connect said storage means in the data path between control units of the data processing system.