Switching maxtrix control circuit for handling requests on a first-come first-serve priority basis

Claim 2

Apparatus for operating a cross-point switching matrix to connect a plurality of requesting units to selected ones of a plurality of terminal units where each requesting unit signals a request for connection and signals the identification of the terminal unit, the apparatus comprising a plurality of control status circuits corresponding in number to the number of requesting units, each control status circuit controlling each of the cross-points in the matrix associated with one requesting unit, a stack memory having a number of storage locations corresponding to the number of requesting units, means responsive to any of said control status circuits when a request signal is received from the corresponding one of the requesting units for inserting a coded word identifying the requesting unit into the stack memory, a scanning circuit, means responsive to the scanning circuit for reading out each of the request identifying words from the stack memory in sequence, each status circuit including means responsive to a word identifying the associated one of the requesting units when read out of the memory for activating the cross-point connection between the requesting unit and the particular terminal unit identified by the requesting unit.

Claim 3

Apparatus as defined in claim 1 wherein said means for inserting a coded word into the stack memory includes a priority circuit for inserting a coded word identifying one of the requesting units at a time into the stack memory on a predetermined priority basis where two or more simultaneous requests are initiated by the control status units.

Claim 4

Apparatus as defined in claim 1 further including means signaling when a particular terminal unit is busy, and means inhibiting said cross-point activating means when the particular terminal unit is busy.

Claim 5

Apparatus as defined in claim 3 further including means for deleting the corresponding word from the stack memory when the cross-point connection is activated.

Claim 6

Apparatus as defined in claim 3 further including means activating the scanning circuit to repeatedly scan the contents of the stack memory, and means interrupting said scanning ciRcuit whenever a new request unit identifying word is being inserted in the stack memory.

Claim 7

Apparatus as defined in claim 5 wherein the scanning circuit scans the words stored in the stack memory in the reverse order in which the words were inserted into the stack.

Claim 8

A control circuit for a cross-point switching matrix interconnecting any one of a first group of devices and any one of a second group of devices in response to input signals identifying the devices in each group to be interconnected, the control circuit comprising means for storing a plurality of device identifying words, means responsive to said input signals for inserting a word in the storing means for each device of the first group requiring a connection to a device of the second group, the words being inserted in the order in which the input signals are received, means scanning the words in the storing means in predetermined sequence, and means responsive to each word as it is scanned in the storing means and the input signals for completing the cross-point connection in the switching matrix between the device in the first group identified by the stored word and the device in the second group identified by the input signals.

Claim 9

A control circuit for a cross-point switching matrix interconnecting any one of a first group of devices and any one of a second group of devices in response to input signals identifying the devices in each group to be interconnected, the control circuit comprising means for storing a plurality of device identifying words, means responsive to said input signals for inserting a word in the storing means for each device of the first group requiring a connection to a device of the second group, the words being inserted in the order in which the input signals are received, means scanning the words in the storing means in predetermined sequence, and means responsive to each word as it is scanned in the storing means and the input signals for completing the cross-point connection in the switching matrix between the device in the first group identified by the stored word and the device in the second group identified by the input signals.

Claim 10

Apparatus as defined in claim 7 further including means signaling when a particular device in the second group is busy, and means inhibiting said cross-point connection completing means in response to a busy signal by said signaling means.

Claim 11

Apparatus as defined in claim 7 further including means for deleting a particular word from the storing means when the corresponding cross-point connection is completed.

Claim 12

Apparatus as defined in claim 7 wherein the scanning means scans the words in the storing means in the reverse order in which the words are inserted into the storing means.

Claim 13

Apparatus for operating a cross-point switching matrix to connect a plurality of requesting units to selected ones of a plurality of terminal units where each requesting unit signals a request for connection and signals the identification of the terminal unit, the apparatus comprising a plurality of control status circuits corresponding in number to the number of requesting units, each control status circuit controlling each of the cross-points in the matrix associated with one requesting unit, each control status unit including a control register having a plurality of control states, the control register advancing in sequence through said states, means responsive to a request signal from the associated one of the requesting units for advancing the control register from a first state to a second state, a stack memory, a scanner control circuit for the stack memory including means responsive to the control register in any of the control status units when in said second state for adjusting the contents of the stack memory and inserting a new word identifying the control status unit and associated requesting unit in one end of the stack memory, means advancing the control register in that particular control status unit to a third state when the identifying word has been stored, means responsive to the control registers in the control status units for reading out each of the words from the stack memory in sequence whenever none of said control registers is in the second state, means responsive to each word read out of the stack memory for signaling if the terminal unit signaled by the requesting unit identified by the word read out of the stack memory is available, and means responsive to said available signal for completing the cross-point connection in the switching matrix between the requesting unit and the terminal unit if the terminal unit is available, said last-named connection completing means including means for advancing the control register in the associated control status unit to a fourth state and deleting the identifying work from the stack memory.

Claim 14

Apparatus for operating a cross-point switching matrix to connect a plurality of requesting units to selected ones of a plurality of terminal units where each requesting unit signals a request for connection and signals the identification of the terminal unit, the apparatus comprising a plurality of control status circuits corresponding in number to the number of requesting units, each control status circuit controlling each of the cross-points in the matrix associated with one requesting unit, each control status unit including a control register having a plurality of control states, the control register advancing in sequence through said states, means responsive to a request signal from the associated one of the requesting units for advancing the control register from a first state to a second state, a stack memory, a scanner control circuit for the stack memory including means responsive to the control register in any of the control status units when in said second state for adjusting the contents of the stack memory and inserting a new word identifying the control status unit and associated requesting unit in one end of the stack memory, means advancing the control register in that particular control status unit to a third state when the identifying word has been stored, means responsive to the control registers in the control status units for reading out each of the words from the stack memory in sequence whenever none of said control registers is in the second state, means responsive to each word read out of the stack memory for signaling if the terminal unit signaled by the requesting unit identified by the word read out of the stack memory is available, and means responsive to said available signal for completing the cross-point connection in the switching matrix between the requesting unit and the terminal unit if the terminal unit is available, said last-named connection completing means including means for advancing the control register in the associated control status unit to a fourth state and deleting the identifying work from the stack memory.

Claim 15

Apparatus as defined in claim 11 further including priority means associated with said word inserting means for causiNg one identifying word at a time to be inserted in the stack memory when two or more control registers are simultaneously in the second state.