Control device for an electronic wrist-watch

Claim 2

A control device for electronic watches, comprising a push button switch for providing a control signal, delay means and first and second flip-flop circuits, inputs of each of said flip-flop circuits being connected to said push button switch by said delay means and by non-delayed circuit means, said control signal being applied to said inputs with and without delay respectively, one output of each of said flip-flop circuits being an output of said control device, and resetting means for said first and second flip-flop circuits adapted to reset said flip-flop circuits into complementary initial conditions, different combinations of output information being thus obtained at the outputs of said flip-flop circuits and of the control device respectively at the end of a delay time according to the duration of actuation of said push button switch.

Claim 3

A control device in accordance with claim 1, in which the delay means is a monostable circuit.

Claim 4

A control device in accordance with claim 1, in which the delay means is a counter actuated by the control signal and fed by signals derived from a watch circuit.

Claim 5

A control device in accordance with claim 1, in which a resetting signal of the device is given by means external to the device.

Claim 6

A control device according to claim 1, wherein said flip-flop circuits are D-flip-flops, said delay means being connected between said push button switch and the control inputs of each of said D-flip-flops while the data inputs of said D-flip-flops are controlled from the push button switch without delay, common control for the resetting inputs of both flip-flops being provided.

Claim 7

A control device according to claim 1, wherein the Q output of said first flip-flop circuit and the Q output of said second flip-flop circuit are outputs of the control device.

Claim 8

A control device according to claim 1, wherein the data inputs of said flip-flop circuits are connected to said push button switch through a common inverter and the control inputs of said flip-flop circuits are connected to said push button switch through said delay means and an inverter, said push button switch changing said control signal from "1" to "0" when actuated and one of said flip-flop circuits being reset to "0" while the other flip-flop circuit is reset to "1".

Claim 9

A control device in accordance with claim 1, in which a second delay means is provided for resetting of the device.

Claim 10

A control device in accordance with claim 8, in which the said second delay means is a monostable circuit.

Claim 11

A control device in accordance with claim 8, in which the said second delay means is a counter actuated by the control signal and fed by signals derived from a watch circuit.

Claim 12

A control device for electronic watches, comprising a switch for providing input signals at an input terminal, delay means connected to said input terminal, two flip-flop circuits having each two inputs connected to and controllable from said input terminal by said input signals through said delay means with a delay and through non-delayed means without delay respectively, an output of each of said flip-flop circuits being an output terminal of the control device, and resetting means for said flip-flop circuits, operable after the lapse of the delay time of said delay means for common resetting of said flip-flop circuits into predetermined initial conditions, such initial conditions corresponding to an initial combination of information at said output terminals, combinations of output information differing from each other and differing from said initial combination of information being thus obtained at the output terminals between the end of said delay time of said delay means and resetting of said flip-flop circuits according to whether the duration of actuation of said push button switch is shorter or longer than said delay time.

Claim 13

A control device for electronic watches, comprising a switch for providing input signals at an input terminal, delay means connected to said input terminal, two flip-flop circuits having each two inputs connected to and controllable from said input terminal by said input signals through said delay means with a delay and through non-delayed means without delay respectively, an output of each of said flip-flop circuits being an output terminal of the control device, and resetting means for said flip-flop circuits, operable after the lapse of the delay time of said delay means for common resetting of said flip-flop circuits into predetermined initial conditions, such initial conditions corresponding to an initial combination of information at said output terminals, combinations of output information differing from each other and differing from said initial combination of information being thus obtained at the output terminals between the end of said delay time of said delay means and resetting of said flip-flop circuits according to whether the duration of actuation of said push button switch is shorter or longer than said delay time.