Patent US4070646A successfully refreshed from Google Patents.
US4070646A
Expired / Lapsed
US
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Pulse error detector
Assignee: CMC TELECOM Corp
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Filing: 1976-06-25
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Granted: 1978-01-24
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Expires: 1996-06-25
Abstract
Abstract An error detector for received pulses, which pulses normally alternately extend in opposite directions. An up-down counter has first, second, third and fourth sequential states. Means is provided for forming an error signal when the counter is in either the first or fourth state. Means is provided for resetting the counter to one of the second and third states after the counter reaches either the first or fourth state. Means is provided for receiving the pulses and for causing the counter to count up a state responsive to a pulse of one direction and for causing the counter to count down a state responsive to a pulse of the other direction.
Inventors
- 👤 Tommy L. Sandlin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 17:45
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/24; H04L1/245; H04L1/247
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
108 words
An error detector for received pulses which pulses normally alternately extend in opposite directions, comprising: a resettable up-down counter having first, second, third and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth state; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth state; and means for receiving said pulses and for causing said counter to count up a state responsive to a pulse of one direction and for causing said counter to count down a state responsive to a pulse of the other direction.
Claim 2
Dependent Claim
108 words
An error detector for received pulses which pulses normally alternately extend in opposite directions, comprising: a resettable up-down counter having first, second, third and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth state; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth state; and means for receiving said pulses and for causing said counter to count up a state responsive to a pulse of one direction and for causing said counter to count down a state responsive to a pulse of the other direction.
Claim 3
Dependent Claim
23 words
The error detector of claim 1 comprising means for forming a signal indicative of the presence of at least one of said pulses.
Claim 4
Dependent Claim
20 words
The error detector of claim 1 comprising direct current isolation means for coupling between the received pulses and said counter.
Claim 5
Dependent Claim
45 words
The error detector of claim 1 wherein said means for causing said counter to count up and down comprises first and second output circuits coupled to the counter and means for forming, respectively, up and down count signals at said first and second output circuits.
Claim 6
Dependent Claim
124 words
An error detector and indicator for received pulses which pulses normally alternately extend in opposite directions, comprising: a resettable up-down counter having first, second, third and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth states; means responsive to said error signal for forming a visual indication of an error; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth state; and means for receiving said pulses and for causing said counter to count up a state responsive to a pulse of one direction and for causing said counter to count down a state responsive to a pulse of the other direction.
Claim 7
Dependent Claim
124 words
An error detector and indicator for received pulses which pulses normally alternately extend in opposite directions, comprising: a resettable up-down counter having first, second, third and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth states; means responsive to said error signal for forming a visual indication of an error; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth state; and means for receiving said pulses and for causing said counter to count up a state responsive to a pulse of one direction and for causing said counter to count down a state responsive to a pulse of the other direction.
Claim 8
Dependent Claim
42 words
The error detector of claim 5 comprising means for forming a signal indicative of the presence of at least one of said pulses, and an indicator responsive to said signal indicative of the presence of a pulse for providing a visual indication.
Claim 9
Dependent Claim
144 words
An error detector for received pulses which pulses alternately extend in opposite directions, comprising: a resettably up-down counter having first, second, third, and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth state; signal extending means for said error signal; means responsive to said extended error signal for forming a visual indication; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth states; isolation means for receiving said pulse signal and for applying up and down count signals to said counter corresponding respectively to pulses extending in first and second directions; means responsive to the presence of at least one of said pulses for forming a pulse present signal; and means responsive to said pulse present signal for forming a visual indication.
Claim 10
Dependent Claim
144 words
An error detector for received pulses which pulses alternately extend in opposite directions, comprising: a resettably up-down counter having first, second, third, and fourth sequential states; means for forming an error signal when said counter is in either said first or fourth state; signal extending means for said error signal; means responsive to said extended error signal for forming a visual indication; means for resetting said counter to one of said second and third states after said counter reaches either said first or fourth states; isolation means for receiving said pulse signal and for applying up and down count signals to said counter corresponding respectively to pulses extending in first and second directions; means responsive to the presence of at least one of said pulses for forming a pulse present signal; and means responsive to said pulse present signal for forming a visual indication.
Claim 11
Dependent Claim
60 words
The error detector of claim 5, in which the error signal is a pulse and the means for forming a visual indication of an error comprises a visual indicator, means for stretching the error signal pulse sufficiently to provide an indication that can be seen visually, and means for energizing the visual indicator responsive to the stretched error signal pulse.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-01-23 | 1981-07-25 | 1982-01-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-01-23 | 1985-07-25 | 1986-01-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-01-23 | 1989-07-25 | 1990-01-24 | $7700.00 | Window Closed / Lapsed |