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US4059806A
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Pulse position demodulator circuit
Assignee: Singer Co
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Filing: 1976-11-15
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Granted: 1977-11-22
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Expires: 1996-11-15
Abstract
Abstract A pulse position demodulator circuit is provided which finds particular use in instrument landing systems, but which has general utility. The system responds to a pulse signal in which successive pulse pairs are position modulated in accordance with an incremental modulating signal, and it provides digital outputs which are precise measurements of the time spacing between the pulses of each individual pair, the digital outputs constituting a representation of the modulating incremental signal. The system includes a network for generating a multiplicity of clock signals having different phase relationships. A particular clock is selected by the lead pulse of each received pulse pair to enable a correct digital output to be produced by the system even though the second pulse of the pair may be received earlier or later than a particular reference time. This reduces the resolution requirements of the system without affecting its accuracy, thereby permitting a low speed shift register to be used of the order of one-fourth the length of the shift register which would be required in an equivalent prior art system.
Inventors
- 👤 Henry Tyrrell Vagt, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 03:25
CPC Classifications
G; G08; G08G; G08G5/00; G08G5/20; G08G5/26; G08G5/21; G08G5/50; G08G5/54; H; H03; H03K; H03K9/00; H03K9/04
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
173 words
A pulse position demodulator circuit for providing digital outputs representative of the time spacing between received incrementally modulated pulse pairs, said circuit comprising: a clock oscillator for generating a clock signal of relatively high frequency; quantizing circuit means coupled to the clock oscillator for producing quantized pulses synchronized with said clock signal in response to the received modulated pulse pairs; shift register means; means coupling said quantizing circuit means to said shift register means for propagating the quantized pulses down the shift register means; first circuit means coupled to the clock oscillator for producing a plurality of clock signals and having predetermined mutual phase relationships with one another; further circuit means coupling the quantizing circuit means to said first circuit means to select one of said plurality of clock signals for application to said shift register as determined by the timing of the first quantizing pulses of each of the received pairs with respect to a selected reference; and output circuit means obtaining inputs from said shift register means providing said digital outputs.
Claim 2
Dependent Claim
173 words
A pulse position demodulator circuit for providing digital outputs representative of the time spacing between received incrementally modulated pulse pairs, said circuit comprising: a clock oscillator for generating a clock signal of relatively high frequency; quantizing circuit means coupled to the clock oscillator for producing quantized pulses synchronized with said clock signal in response to the received modulated pulse pairs; shift register means; means coupling said quantizing circuit means to said shift register means for propagating the quantized pulses down the shift register means; first circuit means coupled to the clock oscillator for producing a plurality of clock signals and having predetermined mutual phase relationships with one another; further circuit means coupling the quantizing circuit means to said first circuit means to select one of said plurality of clock signals for application to said shift register as determined by the timing of the first quantizing pulses of each of the received pairs with respect to a selected reference; and output circuit means obtaining inputs from said shift register means providing said digital outputs.
Claim 3
Dependent Claim
38 words
The pulse position demodulator circuit defined in claim 1, and which includes an input circuit including a comparator for receiving the incrementally modulated pulse pairs, and for introducing square wave signals corresponding thereto to said quantizing circuit means.
Claim 4
Dependent Claim
31 words
The pulse position demodulator circuit defined in claim 1, in which said first circuit means includes counter means, decoder means, and a latch circuit for producing said plurality of clock signals.
Claim 5
Dependent Claim
26 words
The pulse position demodulator circuit defined in claim 3, in which said further circuit means is connected to said latch circuit in said first circuit means.
Claim 6
Dependent Claim
44 words
The pulse position demodulator circuit defined in claim 4, and which includes clock selection logic coupled to the output of said latch circuit for selecting one of the plurality of clock signals for application to said shift register, as determined by the latch circuit.
Claim 7
Dependent Claim
20 words
The pulse position demodulator circuit defined in claim 5, in which said counter means produces sine and cosine related outputs.
Claim 8
Dependent Claim
49 words
The pulse position demodulator circuit defined in claim 1, in which said quantizing circuit comprises a pair of flip-flops interconnected, and one of said flip-flops being connected to said clock oscillator, for producing said quantized pulses in response to the received modulated pulse pairs synchronized with said clock signal.
Claim 9
Dependent Claim
28 words
The pulse position demodulator circuit defined in claim 1, in which said coupling means for coupling said quantizing circuit means to said shift register means comprises a flip-flop.
References Cited (Backward Citations)
US3767855A
Cited
US3980820A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-11-21 | 1981-05-23 | 1981-11-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-11-21 | 1985-05-23 | 1985-11-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-11-21 | 1989-05-23 | 1989-11-22 | $7700.00 | Window Closed / Lapsed |