Method of simultaneously forming a polycrystalline silicon gate and a single crystal extension of said gate in silicon on sapphire MOS devices

Claim 1

In a method for manufacture of an integrated circuit comprised of devices comprising silicon mesas adjacent a single crystal insulating substrate, the circuit having a connecting strip, the strip extending from the substrate and merging into a conductive layer above the mesa, the improvement comprising making the connecting strip by the steps of: a. depositing a polycrystalline silicon layer above at least one mesa onto a layer of a noncrystalline material adjacent the mesa from a silicon source evaporated at a temperature between 900° C and 1,200° C; b. simultaneously depositing a single crystal silicon layer onto the substrate from the same silicon source evaporated at the same temperature, the substrate having an exposed surface oriented for epitaxial growth of silicon thereon; and c. selectively removing portions of the deposited polycrystalline silicon layer and the single crystal layer whereby the polycrystalline silicon layer is shaped to comprise a gate above said mesa and the single crystalline silicon layer is shaped to comprise said connecting strip.