Patent US4000429A successfully refreshed from Google Patents.
US4000429A
Expired / Lapsed
US
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Semiconductor circuit device
Assignee: Toshiba Corp
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Filing: 1975-05-06
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Granted: 1976-12-28
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Expires: 1995-05-06
Abstract
Abstract A semiconductor circuit device comprises a first depletion type n-channel insulated gate field effect transistor (hereinafter referred to as IG-FET) having its gate and source electrodes connected to each other, a second depletion type n-channel IG-FET connected between the source electrode of the first n-channel IG-FET and a positive power source and having its source and gate electrodes connected to each other, an enhancement type n-channel IG-FET connected between the source electrode of the first IG-FET and ground and having its gate electrode connected to an input terminal, an output terminal connected to the drain electrode of the first IG-FET, and a capacitor connected to the above-mentioned output terminal and ground. When a potential on the above-mentioned input terminal is dropped down to zero volt, the first depletion type IG-FET is abruptly shifted to the ON state, causing the capacitor to be abruptly charged by a positive power source. When the potential on the above-mentioned input terminal is raised to a predetermined positive level, the capacitor is slowly discharged through a zero-volt channel i.e. a remaining channel of the first depletion type IG-FET whose gate electrode is biased to zero volt.
Inventors
- 👤 Kenji Yoshida
- 👤 Kazunori Oouchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 16:43
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4094; G11C11/403; G11C11/405; H; H03; H03K; H03K5/00; H03K5/01; H03K5/02; H03K5/023
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
82 words
A semiconductor circuit device comprising: a transfer gate circuit including at least one first depletion type IG-FET of one conduction type channel having first and second electrodes and a gate electrode connected to one of said first and second electrodes, a capacitance connected between ground and a node at the output side of said transfer gate circuit, and a capacitance charging and discharging circuit connected to the input side of said transfer gate circuit so as to charge and discharge said capacitance.
Claim 2
Dependent Claim
82 words
A semiconductor circuit device comprising: a transfer gate circuit including at least one first depletion type IG-FET of one conduction type channel having first and second electrodes and a gate electrode connected to one of said first and second electrodes, a capacitance connected between ground and a node at the output side of said transfer gate circuit, and a capacitance charging and discharging circuit connected to the input side of said transfer gate circuit so as to charge and discharge said capacitance.
Claim 3
Dependent Claim
42 words
A semiconductor circuit device according to claim 1, in which said transfer gate circuit is comprised of a first depletion type n-channel IG-FET having source and gate electrodes connected in common to the output side of said capacitance charging and discharging circuit.
Claim 4
Dependent Claim
59 words
A semiconductor circuit device according to claim 1, in which said transfer gate circuit is comprised of a first depletion type n-channel IG-FET having a source electrode connected to the output side of said capacitance charging and discharging circuit and gate and drain electrodes connected in common to said node at the output side of said transfer gate circuit.
Claim 5
Dependent Claim
56 words
A semiconductor circuit device according to claim 1, in which said transfer gate circuit comprises a first depletion type IG-FET whose gate and drain electrodes are connected to each other, and a second depletion type IG-FET connected in series with the first depletion type IG-FET and having its gate and source electrodes connected to each other.
Claim 6
Dependent Claim
91 words
A semiconductor circuit device according to claim 1, in which said capacitance charging and discharging circuit comprises a power source terminal, a charging circuit including a second depletion type IG-FET connected between said power source terminal and an input terminal of said transfer gate circuit and having its gate and source electrodes connected in common with each other, and a discharge circuit including a first enhancement type IG-FET connected between ground and the input side of said transfer gate circuit and having a gate electrode connected to receive an input signal.
Claim 7
Dependent Claim
91 words
A semiconductor circuit device according to claim 1, in which said capacitance charging and discharging circuit comprises a power source terminal, a charging circuit including a first enhancement type IG-FET connected between said power source terminal and an input terminal of said transfer gate circuit and having its gate and drain electrodes connected in common with each other, and a discharging circuit including a second enhancement type IG-FET connected between ground and the input side of said transfer gate circuit and having a gate electrode connected to receive an input signal.
Claim 8
Dependent Claim
75 words
A semiconductor device according to claim 1, in which said capacitance charging and discharging circuit comprises a power source terminal, a charging circuit including a resistive element connected between said power source terminal and an input terminal of said transfer gate circuit, and a discharging circuit including a first enhancement type IG-FET connected between ground and an input terminal of said transfer gate circuit and having a gate electrode connected to receive an input signal.
Claim 9
Dependent Claim
43 words
A semiconductor circuit device according to claim 1, in which said capacitance is a stray capacitance including a gate capacitance of a first enhancement type IG-FET having its gate electrode connected to said node at the output side of said transfer gate circuit.
Claim 10
Dependent Claim
28 words
A semiconductor circuit device according to claim 1, in which said capacitance is a capacitance element connected between ground and the output side of the transfer gate circuit.
Claim 11
Dependent Claim
54 words
A semiconductor circuit device according to claim 1, further including an inverter circuit comprising an enhancement type IG-FET having its gate electrode connected to said node at the output of said transfer gate circuit and its source electrode grounded, and a depletion-type IG-FET connected between said enhancement type IG-FET and a power source terminal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-12-28 | 1980-06-28 | 1980-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-12-28 | 1984-06-28 | 1984-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-12-28 | 1988-06-28 | 1988-12-28 | $7700.00 | Window Closed / Lapsed |