Adaptive clutter velocity cancellation system for pulsed digital MTI system

Claim 2

A digital pulse Doppler radar system comprising: means for digitally encoding received echo signals discretely within each of a succession of relatively short duration range increments each of fixed range position within successive repetition periods of said radar system, said means encoding said signals to have digital magnitudes which are a function of the instantaneous Doppler phase angle of received signals in each of said range increments; means for differencing said digitally encoded signals between adjacent pulse repetition periods to cancel signals exhibiting substantially no echo signal phase change; means for sampling a predetermined band of said range increments during successive pulse repetition periods to determine an average velocity factor as a function of the average moving signal velocity over said band; and means responsive to said average factor and to the individual signal velocities for producing a quantized output during each range increment in which a signal velocity varies from said average moving target velocity within said band.

Claim 3

Apparatus according to claim 1 in which digital logic means are included responsive to said quantized output to correct for the inclusion of corresponding bona fide signal encoded values in said average factor.

Claim 4

Apparatus according to claim 2 in which additional means responsive to signal within individual range increments and to said quantized output are included, said additional means being operative to compute the difference between the average velocity within said predetermined band and the velocity of any bona fide signal within said band and to apply said difference to said means determining said average velocity factor to correct for inclusion of signals differing in velocity from said average in the averaging process.

Claim 5

In a digital pulse Doppler radar system which transmits and receives microwave pulses and includes a mixer and coherent oscillator, the combination comprising: first phase detector means responsive to said mixer and coherent oscillator for producing a first signal train including fixed target echoes and echo signals modulated by a Doppler frequency as a function of a corresponding moving target; means connected to said coherent oscillator for providing a phase shifted coherent oscillator signal; second phase detector means responsive to said mixer and said phase shifted coherent oscillator signal for producing a second signal train including fixed target echoes and echo signals modulated by a Doppler frequency as a function of a corresponding moving target; first and second digital encoding means for encoding the instantaneous signal amplitude in each successive range increment of a predetermined number of relatively short adjacent time increments within each of the repetition periods of said radar system, to produce first and second corresponding encoded video signal trains; means responsive to said first and second signal trains for producing a third digital signal train representative of the echo phase angle corresponding to said first and second video signal trains as representative of the sine and cosine of said echo signal phase angle; digital comparison means responsive to said third digital signal train for producing a fourth signal train containing substantially only the digital difference between said third signal train in a given repetition period and in the last previous repetition period; a digital accumulator responsive to said fourth signal whereby said fourth signal train is digitally accumulated; means for applying said fourth signal train and a correction to said accumulator to reduce the digital accumulation therein over a predetermined sample band of said range increments; a divider responsive to and for dividing the digital number in said accumulator by the number of said range increments in said sample band, thereby to obtain a digital average representative of average moving target velocity within said sample band; subtraction means for subtracting the output of said divider from said fourth signal train; a digital threshold circuit responsive to said subtraction means and being operative to exclude signal values within any of said range increments not exceedng a predetermined value; and detection means responsive to the output of said threshold circuit for producing a quantized output for each range increment during which a signal is passed by said threshold circuit, provided said signal is preceded and followed by a predetermined number of range increments during which said threshold circuit output is zero.

Claim 6

In a digital pulse Doppler radar system which transmits and receives microwave pulses and includes a mixer and coherent oscillator, the combination comprising: first phase detector means responsive to said mixer and coherent oscillator for producing a first signal train including fixed target echoes and echo signals modulated by a Doppler frequency as a function of a corresponding moving target; means connected to said coherent oscillator for providing a phase shifted coherent oscillator signal; second phase detector means responsive to said mixer and said phase shifted coherent oscillator signal for producing a second signal train including fixed target echoes and echo signals modulated by a Doppler frequency as a function of a corresponding moving target; first and second digital encoding means for encoding the instantaneous signal amplitude in each successive range increment of a predetermined number of relatively short adjacent time increments within each of the repetition periods of said radar system, to produce first and second corresponding encoded video signal trains; means responsive to said first and second signal trains for producing a third digital signal train representative of the echo phase angle corresponding to said first and second video signal trains as representative of the sine and cosine of said echo signal phase angle; digital comparison means responsive to said third digital signal train for producing a fourth signal train containing substantially only the digital difference between said third signal train in a given repetition period and in the last previous repetition period; a digital accumulator responsive to said fourth signal whereby said fourth signal train is digitally accumulated; means for applying said fourth signal train and a correction to said accumulator to reduce the digital accumulation therein over a predetermined sample band of said range increments; a divider responsive to and for dividing the digital number in said accumulator by the number of said range increments in said sample band, thereby to obtain a digital average representative of average moving target velocity within said sample band; subtraction means for subtracting the output of said divider from said fourth signal train; a digital threshold circuit responsive to said subtraction means and being operative to exclude signal values within any of said range increments not exceedng a predetermined value; and detection means responsive to the output of said threshold circuit for producing a quantized output for each range increment during which a signal is passed by said threshold circuit, provided said signal is preceded and followed by a predetermined number of range increments during which said threshold circuit output is zero.

Claim 7

Apparatus according to claim 4 in which said detection logic means includes a shift register having a predetermined plurality of bistable stages, an input stage which is responsive to the output of said digital threshold circuit, for shifting the condition of said input stage through said plurality of stages at the frequency rate of said range increments, and said detection means operate to detect the condition of signal in a central stage of said register preceded and followed by a predetermined number of said stages in a "no-signal" condition.

Claim 8

The invention set forth in claim 5 in which said shift register stages are six in number, said central stage is at least one of the third and fourth stages, and said stages in a "no-signal" condition are the first, second, fifth and sixth stages, said signal and "no-signal" conditions being further defined as Q and Q, respectively.

Claim 9

Apparatus according to claim 6 in which said detection means includes a six input terminal coincidence circuit, said terminals being connected discretely to the outputs of corresponding ones of said shift register stages.

Claim 10

Apparatus according to claim 7 including a delay circuit of at least two range increments, said delay circuit being connected to delay said fourth signal train from the output of said digital comparison means and to supply said delayed signal train to said accumulator.

Claim 11

The invention set forth in claim 8, in which said first and second digital encoding means are further defined as providing said range increments approximately equal in duration to the transmitted pulse duration of said radar systems.

Claim 12

Apparatus according to claim 4 including a delay circuit between said digital comparison means and said digital accumulator for delaying said fourth signal train by a time at least equal to the duration of said predetermined number of range increments during which said threshold circuit output is zero preceding a signal at the output of said threshold circuit.

Claim 13

Apparatus according to claim 5 in which means are included for generating and applying said correction signal and said quantized output to block the inclusion of signal in any of said range increments in which said quantized output is extant in the signals applied to said accumulator and sampling means.