Digital scan converter

Claim 2

Apparatus for conversion of a rectangular array of data having a number of rows which differ from a number of columns such that one number is an integral K multiple of the other comprising: a memory having a number of addressable locations sufficient for storing said rectangular array of data, one element of data in each location, and said locations being grouped into K subarrays each of M columns and M rows and M2 elements; and an address sequence generator incLuding first means for addressing in sequential locations each of said memory elements in each column to store elements of said array of data as received in sequence in successive columns of said subarrays starting with the first column of each subarray, taking said subarrays in a given order, and concluding with the last column of each subarray, and second means for sequentially addressing locations of said memory to read said elements of said array just stored from successive rows of said subarrays starting with the first row of each subarray, taking said subarrays in said given order, and concluding with the last row of each subarray.

Claim 3

The combination of claim 1 further including means for reading an element of data from a given location addressed immediately before storing a new element of data therein.

Claim 4

Apparatus for conversion of a rectangular array of data having a number of rows which differs from a number of columns comprising: a memory having a number of addressable locations sufficient for storing said rectangular array of data, one element of data in each location, with said locations being grouped into K subarrays of M columns and M rows, each including M2 memory locations; an address sequence generator including first means for addressing said memory locations in numerical sequence from 0 to KM2-1, and second means for addressing said memory location in a second order increasing the address in steps of KM from 0 to KM2-1 in cycles of M addresses for each set of consecutive KM addresses generated, starting each cycle after the first with a multiple of M from M to (K-1) M, and repeating the pattern through M sets, the first address of each set being a number just one greater that the first address of the preceding set.

Claim 5

Apparatus for conversion of a rectangular array of data having a number of rows which differs from a number of columns comprising: a memory having a number of addressable locations sufficient for storing said rectangular array of data, one element of data in each location, with said locations being grouped into K subarrays of M columns and M rows, each including M2 memory locations; an address sequence generator including first means for addressing said memory locations in numerical sequence from 0 to KM2-1, and second means for addressing said memory location in a second order increasing the address in steps of KM from 0 to KM2-1 in cycles of M addresses for each set of consecutive KM addresses generated, starting each cycle after the first with a multiple of M from M to (K-1) M, and repeating the pattern through M sets, the first address of each set being a number just one greater that the first address of the preceding set.

Claim 6

Apparatus for conversion of each of a sequence of arrays of radar range data, a given array having a number N of range elements which differs from a number M of range sweeps such that the number N is a multiple K of the number M comprising: a random access memory having a number NM of addressable locations for storing a given one of said arrays of data, one element of data in each location, and said locations being grouped into K subarrays of equal M columns and N rows; means for reading an element of data from a given location addressed immediately before storing a new element of data therein from the next array of said sequence of arrays; address sequence generating means having two modes of operation, a first mode for addressing locations of said memory in a first predetermined sequence selected to provide K square subarrays of M2 memory locations to store elements of an array of data as received in order in successive columns of said subarrays starting with the first column of each subarray, taking said subarrays in a given sequence, and concluding with the last column of each subarray, and a second mode for addressing locations of said memory in a second predetermined sequence to read said elements of said array just stored from successive rows of said subarrays starting with the first row of each subarray, taking said subarrays in said given order, and concluding with the last row of each subarray, said address sequence generating means including first means to provide said first predetermined sequence by addressing said memory locations in numerical sequence from A to A+(KM2-1), where A is an arbitrary number, and second means to provide said second predetermined sequence by increasing the address in steps of KM from A to A+(K2-1) in cycles of M addresses for each set of consecutive KM addresses generated, starting each cycle after the first with A plus a multiple of M from M TO (K-1)M, and repeating the pattern through M sets, the first address of each set being a number just one greater than the first addresS of the preceding set; and means for continually alternating said address sequence generator between said first and second means after each sequence of NM memory location addresses has been generated.

Claim 7

Apparatus for conversion of each of a sequence of arrays of radar range data, a given array having a number N of range elements which differs from a number M of range sweeps such that the number N is a multiple K of the number M comprising: a random access memory having a number NM of addressable locations for storing a given one of said arrays of data, one element of data in each location, and said locations being grouped into K subarrays of equal M columns and N rows; means for reading an element of data from a given location addressed immediately before storing a new element of data therein from the next array of said sequence of arrays; address sequence generating means having two modes of operation, a first mode for addressing locations of said memory in a first predetermined sequence selected to provide K square subarrays of M2 memory locations to store elements of an array of data as received in order in successive columns of said subarrays starting with the first column of each subarray, taking said subarrays in a given sequence, and concluding with the last column of each subarray, and a second mode for addressing locations of said memory in a second predetermined sequence to read said elements of said array just stored from successive rows of said subarrays starting with the first row of each subarray, taking said subarrays in said given order, and concluding with the last row of each subarray, said address sequence generating means including first means to provide said first predetermined sequence by addressing said memory locations in numerical sequence from A to A+(KM2-1), where A is an arbitrary number, and second means to provide said second predetermined sequence by increasing the address in steps of KM from A to A+(K2-1) in cycles of M addresses for each set of consecutive KM addresses generated, starting each cycle after the first with A plus a multiple of M from M TO (K-1)M, and repeating the pattern through M sets, the first address of each set being a number just one greater than the first addresS of the preceding set; and means for continually alternating said address sequence generator between said first and second means after each sequence of NM memory location addresses has been generated.