High common mode rejection differential amplifier utilizing enhancement depletion field effect transistors

Claim 2

A differential amplifier comprising: a first depletion mode field effect transistor coupling a drain voltage terminal to a first output terminal, a second depletion mode field effect transistor coupling a drain voltage terminal to a second output terminal; a first enhancement mode field effect transistor coupling said first output terminal to a source voltage terminal and having a gate coupled to a first input terminal and a gate electrode of said second depletion mode transistor; and a second enhancement mode field effect transistor coupling a second output terminal to its source voltage terminal, and having a gate couple to a second input terminal and a gate electrode of said first depletion mode transistor.

Claim 3

A dual channel differential amplifier comprising: first and second enhancement mode field effect transistors coupled between a source voltage terminal and first and second output terminals, respectively; first and second depletion mode field effect transistors coupled between a drain voltage terminal and said first and second output terminals, respectively, thereby forming said dual channels; and circuit means cross-coupling the gate of each said depletion mode transistor to the gate of the enhancement mode transistor of an opposite one of said dual channels and to one of two input terminals whereby the depletion mode and enhancement mode transistors of a given channel of said amplifier will undergo opposite changes of conductance upon application of differential signals to said amplifier input terminals.

Claim 4

A dual channel differential amplifier comprising: first and second enhancement mode field effect transistors coupled between a source voltage terminal and first and second output terminals, respectively; first and second depletion mode field effect transistors coupled between a drain voltage terminal and said first and second output terminals, respectively, thereby forming said dual channels; and circuit means cross-coupling the gate of each said depletion mode transistor to the gate of the enhancement mode transistor of an opposite one of said dual channels and to one of two input terminals whereby the depletion mode and enhancement mode transistors of a given channel of said amplifier will undergo opposite changes of conductance upon application of differential signals to said amplifier input terminals.