US3969747A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Complementary bipolar transistors with IIL type common base drivers
Assignee: Sony Corp
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Filing: 1974-06-10
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Granted: 1976-07-13
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Expires: 1994-06-10
Abstract
Abstract An integrated circuit including an NPN transistor and a compound PNP transistor. The PNP transistor is of the form of a conventional vertical NPN transistor, in common base configuration, supplying base current to a lateral PNP transistor. The emitter of the vertical NPN is disposed in the emitter of the lateral PNP; the base and collector of the vertical NPN are the emitter and base regions, respectively, of the lateral PNP. The separate NPN transistor may be of conventional configuration, or may also be compound, with a lateral PNP supplying base current to an inverse vertical NPN. All conductivity types may be reversed from those listed, also.
Inventors
- 👤 Tadaharu Tsuyuki
- 👤 Hajime Yagi
- 👤 Toshiro Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 09:04
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/63; H10D99/00
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
221 words
A semiconductor device including a pair of complementary transistors comprising a planar substrate of a first conductivity type, first and second regions of opposite conductivity type formed in said substrate from a first surface and separated laterally from each other, third and fourth regions of said first conductivity type formed in said first region, fifth and sixth regions of said first conductivity type formed in said second region, a seventh region of opposite conductivity type formed in said third region, an eighth region of opposite conductivity type formed in said fifth region, a first collector electrode connected to said seventh region, a first base electrode connected to said fourth region, a first emitter electrode connected to said first region, a second base electrode connected to said eighth region, a second emitter electrode connected to said fifth region, a second collector electrode connected to said sixth region, and means for applying a bias potential to said second emitter electrode and to said second collector electrode of such polarity to forward bias the fifth region relative to said second region, and to reverse bias said second region relative to said sixth region, and means for applying a bias potential to said second base electrode and to said second collector of such polarity to forward bias said eighth region relative to said fifth region.
Claim 2
Dependent Claim
221 words
A semiconductor device including a pair of complementary transistors comprising a planar substrate of a first conductivity type, first and second regions of opposite conductivity type formed in said substrate from a first surface and separated laterally from each other, third and fourth regions of said first conductivity type formed in said first region, fifth and sixth regions of said first conductivity type formed in said second region, a seventh region of opposite conductivity type formed in said third region, an eighth region of opposite conductivity type formed in said fifth region, a first collector electrode connected to said seventh region, a first base electrode connected to said fourth region, a first emitter electrode connected to said first region, a second base electrode connected to said eighth region, a second emitter electrode connected to said fifth region, a second collector electrode connected to said sixth region, and means for applying a bias potential to said second emitter electrode and to said second collector electrode of such polarity to forward bias the fifth region relative to said second region, and to reverse bias said second region relative to said sixth region, and means for applying a bias potential to said second base electrode and to said second collector of such polarity to forward bias said eighth region relative to said fifth region.
Claim 3
Dependent Claim
23 words
A semiconductor device according to claim 1 including a first low resistance region formed between said first emitter electrode and said first region.
Claim 4
Dependent Claim
24 words
A semiconductor device according to claim 2 including second and third low resistance buried regions between said substrate and said first and second regions.
Claim 5
Dependent Claim
19 words
A semiconductor device according to claim 3 including an insulating layer formed on said first surface of said substrate.
Claim 6
Dependent Claim
16 words
A semiconductor device according to claim 4 wherein said insulating layer is made of silicon dioxide.
Claim 7
Dependent Claim
223 words
A semiconductor device including a pair of complementary transistors comprising, a planar substrate of a first conductivity type, first and second regions of opposite conductivity type formed in said substrate from a first surface and separated laterally from each other, third, fourth and fifth regions of first conductivity type formed in said first and second regions with said third region in said first region and said fourth and fifth regions in said second region, sixth and seventh regions of opposite conductivity type respectively formed in said third and fourth regions, a first collector electrode connected to said first region, a first base electrode connected to said third region, a first emitter electrode connected to said sixth region, a second base electrode connected to said seventh region, a second emitter electrode connected to said fourth region, a second collector electrode connected to said fifth region, first biasing means for applying a bias potential to said second emitter electrode and said second base electrode of such polarity to forward bias said fourth region relative to said seventh region, and second biasing means for applying a bias potential to said second emitter electrode and said second collector electrode of such a polarity as to forward bias said fourth region relative to said second region, and to reverse bias said second region relative to said fifth region.
Claim 8
Dependent Claim
223 words
A semiconductor device including a pair of complementary transistors comprising, a planar substrate of a first conductivity type, first and second regions of opposite conductivity type formed in said substrate from a first surface and separated laterally from each other, third, fourth and fifth regions of first conductivity type formed in said first and second regions with said third region in said first region and said fourth and fifth regions in said second region, sixth and seventh regions of opposite conductivity type respectively formed in said third and fourth regions, a first collector electrode connected to said first region, a first base electrode connected to said third region, a first emitter electrode connected to said sixth region, a second base electrode connected to said seventh region, a second emitter electrode connected to said fourth region, a second collector electrode connected to said fifth region, first biasing means for applying a bias potential to said second emitter electrode and said second base electrode of such polarity to forward bias said fourth region relative to said seventh region, and second biasing means for applying a bias potential to said second emitter electrode and said second collector electrode of such a polarity as to forward bias said fourth region relative to said second region, and to reverse bias said second region relative to said fifth region.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-07-13 | 1980-01-12 | 1980-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-07-13 | 1984-01-12 | 1984-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-07-13 | 1988-01-12 | 1988-07-13 | $7700.00 | Window Closed / Lapsed |