Monolithic semiconductor circuit for a logic circuit concept of high packing density

Claim 2

A monolithic semiconductor circuit comprising a semiconductor body of a first conductivity type, a pair of mutually spaced regions in said body and each of a second conductivity type, said regions constituting respectively the emitter and collector of a lateral transistor, said collector reigon having therewithin a region of said first conductivity type and constituting the collector of an inversely operated vertical transistor, said collector region of said lateral transistor constituting the base region of said vertical transistor, said semiconductor body constituting the base region of said lateral transistor and the emitter region of said vertical transistor, said collector and base regions of said vertical transistor having therebetween a collector-base P-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, and control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor.

Claim 3

A monolithic semiconductor circuit as recited in claim 1 and comprising output means for conveying current in series with said vertical transistor collector region.

Claim 4

A monolithic semiconductor circuit as recited in claim 2 wherein, the base region of the lateral transistor and hence also the emitter region of the vertical transistor are connected to ground.

Claim 5

A pair of monolithic semiconductor circuits each as recited in claim 2, and means connecting the vertical transistor collector region of each circuit to form a common output.

Claim 6

A pair of monolithic semiconductor circuits each as recited in claim 2, and means connecting said output means of a first of said circuits to said control means of the second of said circuits so as to connect said circuits in cascade.

Claim 7

A monolithic semiconductor circuit as recited in claim 1, and means connecting the base region of the lateral transistor and emitter region of the vertical transistor to a source of fixed potential.

Claim 8

A pair of monolithic semiconductor circuits each as recited in claim 1, an output connected to the collector of the vertical transistor of a first of said circuits, an input connected to the base region of the vertical transistor of the second of said circuits, and means connecting said output to said input whereby the circuits are connected in cascade.

Claim 9

A monolithic semiconductor circuit comprising a semiconductor body of a first conductivity type, a pair of mutually spaced regions in said body and each of a second conductivity type, said regions constituting respectively the emitter and collector of a lateral transistor, said collector reGion having therewithin a region of said first conductivity type and constituting the collector of a vertical transistor, output means for conveying current in series with said vertical transistor collector region, said collector region of said lateral transistor constituting the base region of said vertical transistor, transistor said semiconductor body constituting the base region of said lateral transistor and the emitter region of said vertical transistor. said collector and base regions of said vertical transistor having therebetween a collector-base p-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, and control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor.

Claim 10

A monolithic semiconductor circuit comprising a semiconductor body of a first conductivity type, a pair of mutually spaced regions in said body and each of a second conductivity type, said regions constituting respectively the emitter and collector of a lateral transistor, said collector reGion having therewithin a region of said first conductivity type and constituting the collector of a vertical transistor, output means for conveying current in series with said vertical transistor collector region, said collector region of said lateral transistor constituting the base region of said vertical transistor, transistor said semiconductor body constituting the base region of said lateral transistor and the emitter region of said vertical transistor. said collector and base regions of said vertical transistor having therebetween a collector-base p-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, and control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor.

Claim 11

A pair of monolithic semiconductor circuits each as recited in claim 8, and means connecting the vertical transistor collector region of each circuit to form a common output.

Claim 12

A pair of monolithic semiconductor circuits each as recited in claim 8, and means connecting said output means of a first of said circuits to said control means of the second of said circuit so as to connect said circuits in cascade.

Claim 13

A monolithic semiconductor circuit comprising a semiconductor body of a first conductivity type, a pair of mutually spaced regions in said body and each of a second conductivity type, said regions constituting respectively the emitter and collector of a lateral transistor, said collector region having therewithin a region of said first conductivity type and constituting the collector of a vertical transistor, said collector region of said lateral transistor constituting the base region of said vertical transistor, said semiconductor body constituting the base region of said lateral transistor and the emitter region of said vertical transistor, output means for conveying current in series with said vertical transistor collector region, said collector and base regions of said vertical transistor having therebetween a collector-base P-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor, and means connecting the base region of the lateral transistor and emitter region of the vertical transistor to a source of fixed potential.

Claim 14

A monolithic semiconductor circuit comprising a semiconductor body of a first conductivity type, a pair of mutually spaced regions in said body and each of a second conductivity type, said regions constituting respectively the emitter and collector of a lateral transistor, said collector region having therewithin a region of said first conductivity type and constituting the collector of a vertical transistor, said collector region of said lateral transistor constituting the base region of said vertical transistor, said semiconductor body constituting the base region of said lateral transistor and the emitter region of said vertical transistor, output means for conveying current in series with said vertical transistor collector region, said collector and base regions of said vertical transistor having therebetween a collector-base P-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor, and means connecting the base region of the lateral transistor and emitter region of the vertical transistor to a source of fixed potential.

Claim 15

A monolithic semiconductor circuit comprising a semiconductor body of a predetermined conductivity type, three mutually spaced regions in said body and each of an opposite conductivity type, a first of said regions constituting the collector of a first lateral transistor, a second of said regions constituting the collector of a second lateral transistor, a third of said regions constituting the emitters of both lateral transistors, said first region having therewithin a fourth region of said predetermined conductivity type and constituting the collector of a first vertical transistor, said second region having therewithin a fifth region of said predetermined conductivity type and constituting the collector of a second vertical transistor, said first lateral transistor collector region constituting the base of said first vertical transistor, said second lateral transistor collector region constituting the base of said second vertical transisTor, and said semiconductor body constituting the bases of said lateral transistors and the emitters of said vertical transistors, said collector and base regions of said vertical transistors having therebetween collector-base P-N junctions, said base and emitter regions of said vertical transistors having therebetween base-emitter P-N junctions, means for reverse-biasing said collector-base junctions, current supply means connected to said lateral transistor emitters for supplying current thereto and thereby providing forward bias for said base-emitter junctions, and control means connected to the base regions of said vertical transistors for controlling the conduction of said vertical transistors.

Claim 16

A monolithic semiconductor circuit comprising a semiconductor body of a predetermined conductivity type, three mutually spaced regions in said body and each of an opposite conductivity type, a first of said regions constituting the collector of a first lateral transistor, a second of said regions constituting the collector of a second lateral transistor, a third of said regions constituting the emitters of both lateral transistors, said first region having therewithin a fourth region of said predetermined conductivity type and constituting the collector of a first vertical transistor, said second region having therewithin a fifth region of said predetermined conductivity type and constituting the collector of a second vertical transistor, said first lateral transistor collector region constituting the base of said first vertical transistor, said second lateral transistor collector region constituting the base of said second vertical transisTor, and said semiconductor body constituting the bases of said lateral transistors and the emitters of said vertical transistors, said collector and base regions of said vertical transistors having therebetween collector-base P-N junctions, said base and emitter regions of said vertical transistors having therebetween base-emitter P-N junctions, means for reverse-biasing said collector-base junctions, current supply means connected to said lateral transistor emitters for supplying current thereto and thereby providing forward bias for said base-emitter junctions, and control means connected to the base regions of said vertical transistors for controlling the conduction of said vertical transistors.

Claim 17

A monolithic semiconductor circuit comprising a vertical transistor emitter of a first conductivity type, a vertical transistor base of a second conductivity type and located within said emitter, a vertical transistor collector of said first conductivity type and located within said base, a lateral transistor emitter of said second conductivity type and located within said vertical transistor emitter and in spaced relation to said vertical transistor base, said vertical transistor base also constituting a lateral transistor collector, said vertical transistor emitter also constituting a lateral transistor base, an output connected to said vertical transistor collector, said collector and base regions of said vertical transistor having therebetween a collector-base P-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, and control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor.

Claim 18

A monolithic semiconductor circuit comprising a vertical transistor emitter of a first conductivity type, a vertical transistor base of a second conductivity type and located within said emitter, a vertical transistor collector of said first conductivity type and located within said base, a lateral transistor emitter of said second conductivity type and located within said vertical transistor emitter and in spaced relation to said vertical transistor base, said vertical transistor base also constituting a lateral transistor collector, said vertical transistor emitter also constituting a lateral transistor base, an output connected to said vertical transistor collector, said collector and base regions of said vertical transistor having therebetween a collector-base P-N junction, said base and emitter regions of said vertical transistor having therebetween a base-emitter P-N junction, means for reverse-biasing said collector-base junction, current supply means connected to said lateral transistor emitter for supplying current thereto and thereby providing forward bias for said base-emitter junction, and control means connected to the base region of said vertical transistor for controlling the conduction of said vertical transistor.

Claim 19

A monolithic semiconductor circuit as recited in claim 13, and means connecting the base region of the lateral transistor and emitter region of the vertical transistor to a source of fixed potential.