Digital filter

Claim 1

A digital filter wherein each consecutive sample of an incoming signal is digitally coded with negative amplitudes being coded in a "two-complement" code, said filter including: a shift register to store the values of the last n samples of said incoming signal; a source of clock signals to shift said samples through said shift register, gates on the input of said shift register normally activated by one of said clock signals to feed back the output of said shift register to the input thereof to recirculate said stored values; other gates on the input of said shift register activated by the complement of said one of said clock signals to feed the value of a new sample of said input signal to the input of said shift register; an accumulator to sum up digitally coded values; a read only storage with each storage address set to represent only a positive or a negative value corresponding to delta coding of the impulse response of said digital filter; a clock signal driven cyclic addressing means for said read only storage to provide sequential positive or negative value signals; gates controlled by said sequential positive or negative value signals to pass the oldest value stored in said shift register directly or complementally respectively to an input of said accumulator; and output gates to periodically gate out the accumulated values as a filtered set of output signals.