Patent US3873989A successfully refreshed from Google Patents.
US3873989A
Expired / Lapsed
US
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Double-diffused, lateral transistor structure
Assignee: Fairchild Semiconductor Corp
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Filing: 1973-05-07
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Granted: 1975-03-25
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Expires: 1993-05-07
Abstract
Abstract A double-diffused, lateral transistor structure is fabricated utilizing an etch resistant mask to provide self-aligning positional accuracy for formation of active areas of the transistor. The lateral structure includes semiconductor material having at least one substantially flat surface, and the structure includes at least one region of insulating material formed adjacent the flat surface, the top surface of the insulating material being substantially coplanar with said one surface. A collector is formed in the semiconductor material adjacent first portions of both the flat surface and the insulating material, while an emitter is formed in the semiconductor material adjacent second portions of both the flat surface and the insulating material. A base separates the collector from the emitter.
Inventors
- 👤 Richard D Schinella
- 👤 Michael P Anthony
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:08
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/60; H10D84/00; H10D84/60; H10D84/63; H10D99/00; H10P; H10P76/00; H10P76/40; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/10; H10W10/13; H10W20/00; H10W20/20; Y; Y10; Y10S; Y10S148/00; Y10S148/085; Y10S148/096; Y10S148/117
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
158 words
A semiconductor device fabricated from semiconductor material having one surface which is substantially flat and having overlying insulating material, comprising: a base region formed in a first portion of said semiconductor material adjacent said surface, said base region having a graded impurity concentration; a collector region formed in a second portion of said semiconductor material adjacent said surface, said second portion being adjacent said first portion in lateral relationship along said surface so that a collector-base junction is formed therebetween; an emitter region formed in a third portion of said semiconductor material, said third portion being spaced from said second portion in lateral relationship along said surface; a remote base region surrounding said emitter region thereby isolating said emitter region from said collector region and forming an emitter-base junction; means to electrically contact said base, collector and emitter regions through said insulating material; and a buried conducting channel electrically communicating said base region with said remote base region.
Claim 2
Dependent Claim
158 words
A semiconductor device fabricated from semiconductor material having one surface which is substantially flat and having overlying insulating material, comprising: a base region formed in a first portion of said semiconductor material adjacent said surface, said base region having a graded impurity concentration; a collector region formed in a second portion of said semiconductor material adjacent said surface, said second portion being adjacent said first portion in lateral relationship along said surface so that a collector-base junction is formed therebetween; an emitter region formed in a third portion of said semiconductor material, said third portion being spaced from said second portion in lateral relationship along said surface; a remote base region surrounding said emitter region thereby isolating said emitter region from said collector region and forming an emitter-base junction; means to electrically contact said base, collector and emitter regions through said insulating material; and a buried conducting channel electrically communicating said base region with said remote base region.
Claim 3
Dependent Claim
50 words
A semiconductor device in accordance with claim 1 wherein said base region is of N- conductivity type, said collector region is of P- conductivity type, said emitter region is of P+ conductivity type, said remote base region is of N-conductivity type and said conducting channel is of N+ conductivity type.
Claim 4
Dependent Claim
195 words
A double-diffused, complementary lateral transistor fabricated from semiconductor material having one surface which is substantially flat, comprising: a layer of insulation material overlaying selected portions of said surface; a collector region of p-conductivity type formed in a first portion of said semiconductor material; an emitter region of p -conductivity type formed in a second portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a base region of n -conductivity type separating sdaid emitter region from said collector region, said base region having a graded impurity concentration; means for making electrical communication with said emitter, collector and base regIons, said means for making electrical communication with said base region comprising a conducting channel which contacts said base region within said semiconductor material and which provides electrical communication with said surface at a location separated from said collector, emitter and base regions; an additional region of p -conductivity type formed in said semiconductor material adjacent said collector region; and a further region of n -conductivity type formed in said semiconductor material adjacent said additional region and contacting said surface.
Claim 5
Dependent Claim
195 words
A double-diffused, complementary lateral transistor fabricated from semiconductor material having one surface which is substantially flat, comprising: a layer of insulation material overlaying selected portions of said surface; a collector region of p-conductivity type formed in a first portion of said semiconductor material; an emitter region of p -conductivity type formed in a second portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a base region of n -conductivity type separating sdaid emitter region from said collector region, said base region having a graded impurity concentration; means for making electrical communication with said emitter, collector and base regIons, said means for making electrical communication with said base region comprising a conducting channel which contacts said base region within said semiconductor material and which provides electrical communication with said surface at a location separated from said collector, emitter and base regions; an additional region of p -conductivity type formed in said semiconductor material adjacent said collector region; and a further region of n -conductivity type formed in said semiconductor material adjacent said additional region and contacting said surface.
Claim 6
Dependent Claim
303 words
A double-diffused, complementary lateral transistor structure having NPN and PNP transistors with the base of the PNP transistor being common with the collector of the NPN transistor and being fabricated from a semiconductor material having one surface which is substantially flat, comprising: a layer of insulation material overlying selected portions of said surface; a first collector region of p -conductivity type formed in a first portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a first emitter region of p -conductivity type formed in a second portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a first base region of n -conductivity type separating said first emitter region from said first collector region, said first base region having a graded impurity concentration; a second base region formed in the same p-type region of semiconductor material as said first collector region; a second emitter region of n -conductivity type formed in said second base region and extending to said one surface; a second collector region of n -conductivity type adjacent both said first and second base regions, said second collector region being of the same conductivity type and more heavily doped than said first base region; means for making electrical contact with said first and second emitter regions of opposite conductivity type through openings in said insulation layer on said one surface; and means for making electrical communication with said first base region and said second collector region comprising a conducting channel which makes contact with said regions within said semiconductor material and which provides electrical communication at said one surface at a location separated from said regions.
Claim 7
Dependent Claim
303 words
A double-diffused, complementary lateral transistor structure having NPN and PNP transistors with the base of the PNP transistor being common with the collector of the NPN transistor and being fabricated from a semiconductor material having one surface which is substantially flat, comprising: a layer of insulation material overlying selected portions of said surface; a first collector region of p -conductivity type formed in a first portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a first emitter region of p -conductivity type formed in a second portion of said semiconductor material and extending under an edge of said layer of insulation material with said emitter region being laterally spaced from said collector region; a first base region of n -conductivity type separating said first emitter region from said first collector region, said first base region having a graded impurity concentration; a second base region formed in the same p-type region of semiconductor material as said first collector region; a second emitter region of n -conductivity type formed in said second base region and extending to said one surface; a second collector region of n -conductivity type adjacent both said first and second base regions, said second collector region being of the same conductivity type and more heavily doped than said first base region; means for making electrical contact with said first and second emitter regions of opposite conductivity type through openings in said insulation layer on said one surface; and means for making electrical communication with said first base region and said second collector region comprising a conducting channel which makes contact with said regions within said semiconductor material and which provides electrical communication at said one surface at a location separated from said regions.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-03-24 | 1978-09-23 | 1979-03-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-03-24 | 1982-09-23 | 1983-03-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-03-24 | 1986-09-23 | 1987-03-25 | $7700.00 | Window Closed / Lapsed |