Patent US3849673A successfully refreshed from Google Patents.
US3849673A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Compensated igfet flip-flop amplifiers
Assignee: AT&T Inc
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Filing: 1973-11-09
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Granted: 1974-11-19
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Expires: 1993-11-09
Abstract
Abstract Differences in the parameters of IGFET''s, which tend to limit the sensitivity of differential signal, flip-flop amplifiers using IGFETs, are minimized. In a first embodiment of the invention, the difference in the threshold voltages of the transistors is minimized by precharging the drain electrodes of the cross-coupled IGFETs to the threshold voltage of the respective transistors. In a second embodiment, all parameter differences are minimized. In this second embodiment capacitive cross-coupling is employed. During a preconditioning period, stable, though unequal operating conditions are established in the cross-coupled IGFETs. These conditions are maintained in a second, sensing period during which the slightest inequality in the input signals applied to the amplifier causes one of the transistors to turn off.
Inventors
- 👤 J Koo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 11:15
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/4063; G11C11/407; G11C11/409; G11C11/4091; H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356069; H03K3/356078; H03K5/00; H03K5/01; H03K5/02; H03K5/023
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
143 words
A signal amplifier comprising: a first pair of insulated gate field effect transistors having their source electrodes connected to a first common junction; means, including the source-drain circuit of a second pair of insulated gate field effect transistors, for cross-coupling the gate electrode of each of said first pair of transistors to the drain electrode of the other of said first pair of Transistors; the gate electrodes of said second pair of transistors being connected to a second common junction; means, including the source-drain circuit of a third pair of insulated gate field effect transistors, for coupling the gate electrodes of said first pair of transistors to a third common junction; means for connecting the gate electrodes of said third pair of transistors to a fourth common junction; and signal input terminals located in the gate-drain circuits of said first pair of transistors.
Claim 2
Dependent Claim
143 words
A signal amplifier comprising: a first pair of insulated gate field effect transistors having their source electrodes connected to a first common junction; means, including the source-drain circuit of a second pair of insulated gate field effect transistors, for cross-coupling the gate electrode of each of said first pair of transistors to the drain electrode of the other of said first pair of Transistors; the gate electrodes of said second pair of transistors being connected to a second common junction; means, including the source-drain circuit of a third pair of insulated gate field effect transistors, for coupling the gate electrodes of said first pair of transistors to a third common junction; means for connecting the gate electrodes of said third pair of transistors to a fourth common junction; and signal input terminals located in the gate-drain circuits of said first pair of transistors.
Claim 3
Dependent Claim
80 words
The amplifier according to claim 1 including voltage means connected to said four common junctions for simultaneously driving said second pair of transistors off and said third pair of transistors on during a first time period and, thereby, precharging each of the drain electrodes of said first pair of transistors to the threshold voltage for the respective transistors; and for simultaneously driving said second pair of transistors on and said third pair of transistors off during a second time interval.
Claim 4
Dependent Claim
182 words
A signal amplifier comprising: first and second insulated gate field effect transistors; a first coupling capacitor connecting the gate electrode of said first transistor to the drain electrode of said second transistor, a second coupling capacitor connecting the gate electrode of said second transistor to the drain electrode of said first transistor, means for connecting the source electrodes of said first and second transistors to a first common junction; means, including the source-drain circuit of a second pair of insulated gate field effect transistors, for coupling the drain electrodes of said first and second transistors to a second common junction; means, including the source-drain circuits of a third pair of insulated gate field effect transistors, for coupling the gate electrode of said first transistor to the drain electrode of said first transistor, and for coupling the gate electrode of said second transistor to the drain electrode of said second transistor; means for connecting the gate electrodes of said third pair of transistors to a third common junction; and signal input terminals located in the gate-drain circuits of said first and second transistors.
Claim 5
Dependent Claim
182 words
A signal amplifier comprising: first and second insulated gate field effect transistors; a first coupling capacitor connecting the gate electrode of said first transistor to the drain electrode of said second transistor, a second coupling capacitor connecting the gate electrode of said second transistor to the drain electrode of said first transistor, means for connecting the source electrodes of said first and second transistors to a first common junction; means, including the source-drain circuit of a second pair of insulated gate field effect transistors, for coupling the drain electrodes of said first and second transistors to a second common junction; means, including the source-drain circuits of a third pair of insulated gate field effect transistors, for coupling the gate electrode of said first transistor to the drain electrode of said first transistor, and for coupling the gate electrode of said second transistor to the drain electrode of said second transistor; means for connecting the gate electrodes of said third pair of transistors to a third common junction; and signal input terminals located in the gate-drain circuits of said first and second transistors.
Claim 6
Dependent Claim
51 words
The amplifier according to claim 3 including voltage means connected to said three common junctions for simultaneously driving all of said transistors on during a first time period; and for turning off said third pair of transistors while leaving said other transistors in a on state during a second time period.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-11-18 | 1978-05-20 | 1978-11-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-11-18 | 1982-05-20 | 1982-11-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-11-18 | 1986-05-20 | 1986-11-19 | $7700.00 | Window Closed / Lapsed |