US3789276A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multilayer microelectronic circuitry techniques
Assignee: Texas Instruments Inc
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Filing: 1970-08-06
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Granted: 1974-01-29
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Expires: 1990-08-06
Abstract
Abstract A microelectronic circuit fabrication technique where an electron beam forms hillocks of single crystal material through a dielectric layer from a single crystal substrate. A single crystal is then grown atop each hillock over the dielectric layer by first epitaxially depositing material using the hillock as a nucleation site. The epitaxially deposited material is next expanded by means of a scanning electron beam into a broad area of single crystal material. This single crystal may be patterned to form component sites. Multilayer structures are formed by covering each previous dielectric layer and component sites with a subsequent dielectric layer and repeating the process of single crystal growth using extensions of the hillocks as nucleation sites.
Inventors
- 👤 D Sivertsen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 20:55
CPC Classifications
H; H10; H10P; H10P95/00; H10D; H10D84/00; H10D84/01; H10D86/00; H10D86/01; H10D87/00; H10W; H10W74/00; H10W74/40; H10W74/43
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
81 words
A three-dimensional composite microelectronic circuit structure comprising: a single crystalline semiconductor substrate, a layer of dielectric material overlaying said substrate and in non-epitaxial relationship therewith, having selectively located holes therein, and a plurality of single crystal islands of semiconductor material discretely located on said dielectric layer, selective ones of said plurality overlaying and extending a substantial distance laterally of respective ones of said holes and electrically connected to said substrate through said respective ones of said holes by single crystalline material.
Claim 2
Dependent Claim
81 words
A three-dimensional composite microelectronic circuit structure comprising: a single crystalline semiconductor substrate, a layer of dielectric material overlaying said substrate and in non-epitaxial relationship therewith, having selectively located holes therein, and a plurality of single crystal islands of semiconductor material discretely located on said dielectric layer, selective ones of said plurality overlaying and extending a substantial distance laterally of respective ones of said holes and electrically connected to said substrate through said respective ones of said holes by single crystalline material.
Claim 3
Dependent Claim
46 words
The three-dimensional composite microelectronic circuit structure of claim 1 further comprising at least one additional layer of dielectric material overlaying said substrate wherein said plurality of single crystal islands of semiconductor material is sandwiched between said dielectric layer and said at least one additional dielectric laYer.
Claim 4
Dependent Claim
47 words
A three-dimensional composite micro-electronic circuit structure as set forth in claim 2 including a. a second plurality of islands on said at least one additional layer and b. hillocks of single crystal material interconnecting selective islands of said first plurality with selective islands of said second plurality.
Claim 5
Dependent Claim
28 words
A three-dimensional composite microelectronic circuit structure as set forth in claim 3, including hillocks of single crystal material selectively interconnecting said substrate with said first and second plurality.
Claim 6
Dependent Claim
24 words
A three-dimensional composite microelectronic circuit structure as set forth in claim 2 wherein said single crystal substrate and said islands are single crystal silicon.
Claim 7
Dependent Claim
20 words
The three-dimensional composite microelectronic circuit structure as set forth in claim 1 wherein said dielectric layer comprises a semiconductor compound.
Claim 8
Dependent Claim
110 words
A multilayer microelectronic circuit having a single crystal semiconductor substrate with a dielectric overlay in non-epitaxical relationship with said substrate having holes selectively located therein comprising a plurality of single crystal hillocks on the surface of said single crystal protruding into and through said holes of said overlay, and a component situs comprising an island of single crystal material on the dielectric overlay adjacent each of said hillocks for forming electronic circuit components therein, at least some of said component sites electrically connected to said substrate by respective ones of said hillocks and extending on to the dielectric layer a substantial distance laterally of said respective ones of said hillock.
Claim 9
Dependent Claim
110 words
A multilayer microelectronic circuit having a single crystal semiconductor substrate with a dielectric overlay in non-epitaxical relationship with said substrate having holes selectively located therein comprising a plurality of single crystal hillocks on the surface of said single crystal protruding into and through said holes of said overlay, and a component situs comprising an island of single crystal material on the dielectric overlay adjacent each of said hillocks for forming electronic circuit components therein, at least some of said component sites electrically connected to said substrate by respective ones of said hillocks and extending on to the dielectric layer a substantial distance laterally of said respective ones of said hillock.
Claim 10
Dependent Claim
64 words
A multilayer microelectronic circuit as set forth in claim 7 including a second dielectric layer deposited over the preceding dielectric layer and component sites having selectively located holes therein, a second plurality of hillocks protruding into and through said holes of said second layer, and second component sites comprising single crystal material at each of said second plurality for forming electronic circuit elements therein.
Claim 11
Dependent Claim
25 words
A multilayer microelectronic circuit formed from a single crystal substrate as set forth in claim 8 wherein said component sites are low resistivity N+ silicon.
Claim 12
Dependent Claim
20 words
The multilayer microelectronic circuit as set forth in claim 7 wherein the dielectric layer comprises a compound of said semiconductor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1977-01-28 | 1977-07-30 | 1978-01-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1981-01-28 | 1981-07-30 | 1982-01-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1985-01-28 | 1985-07-30 | 1986-01-29 | $7700.00 | Window Closed / Lapsed |