Semiconductor logic circuit

Claim 2

In a current mode type semiconductor logic circuit having at least one input transistor to which an input signal is applied, at least one reference transistor to which a reference signal is applied, said input transistor being adapted so as to operate when said input signal is larger than said reference signal, a power source, and a load circuit connected to said input and reference transistors for deriving out therefrom an output signal from said input and reference transistors, the improvement which comprises at least one grounded emitter transistor through which said power source is connected to said input and reference transistors, and a feedback circuit connected between said load circuit and said grounded emitter transistor for feeding back said output signal thereto.

Claim 3

A logic circuit according to claim 1, wherein said feedback circuit comprises output resistor means connected between the outputs of said input and reference transistors, and a grounded collector transistor connected between said output resistor means and the input of said grounded emitter transistor.

Claim 4

A logic circuit according to claim 1, wherein said feedback circuit comprises an output resistor connected between the outputs of said input and reference transistors, and said grounded emitter transistor connected to said output resistor.

Claim 5

A logic circuit according to claim 1, which comprises a stabilizing circuit connected between said grounded emitter transistor and said power source for stabilizing the emitter voltage of said grounded emitter transistor.

Claim 6

A current mode type semiconductor logic circuit comprising: at least one input transistor to which an input signal is to be applied; a reference transistor to which a reference signal is to be applied, said input and reference transistors being coupled together in common for receiving a source of power; a load means connected to each of said input and reference transistors for generating a signal when said input signal is larger than said reference signal; a power coupling transistor, having its emitter connected to said source of power, connected to the common connection point of said input and reference transistors for coupling thereto said source of power; and means conNected between said load means and power coupling transistor, for feeding back the output of said load circuit to said power coupling transistor, so as to compensate for variations in the output of said logic circuit.

Claim 7

A current mode type semiconductor logic circuit comprising: at least one input transistor to which an input signal is to be applied; a reference transistor to which a reference signal is to be applied, said input and reference transistors being coupled together in common for receiving a source of power; a load means connected to each of said input and reference transistors for generating a signal when said input signal is larger than said reference signal; a power coupling transistor, having its emitter connected to said source of power, connected to the common connection point of said input and reference transistors for coupling thereto said source of power; and means conNected between said load means and power coupling transistor, for feeding back the output of said load circuit to said power coupling transistor, so as to compensate for variations in the output of said logic circuit.

Claim 8

A current mode type semiconductor logic circuit according to claim 5, wherein said feedback means comprises means for resistively connecting the output of said load means to said power coupling transistor.

Claim 9

A current mode type semiconductor logic circuit according to claim 6, wherein said feedback means comprises first and second resistors connected in series between said input and reference transistor outputs, and a feedback transistor coupling the common connection of said first and second resistor to said power coupling transistor.

Claim 10

A current mode type semiconductor logic circuit according to claim 7, wherein said at least one input transistor comprises a first input transistor to which said input signal is applied and a second input transistor connected to the output of said first input transistor and to said reference and said power coupling transistor, the output of said second input transistor being connected to said load means.

Claim 11

A current mode type semiconductor logic circuit according to claim 6, wherein said feedback means comprises a resistor connected between said input and reference transistors and a conductor for coupling the output of one of said input and reference transistor to said power coupling transistor.

Claim 12

A current mode type semiconductor logic circuit according to claim 9, wherein said conductor is connected to said input transistor.

Claim 13

A current mode type semiconductor logic circuit according to claim 9, wherein said conductor is connected to said reference transistor.

Claim 14

A current mode type semiconductor logic circuit according to claim 8, further comprising a stabilizing circuit connected between said power source and said power coupling transistor for compensating for variation in the characteristics of said transistors.

Claim 15

A current mode type semiconductor logic circuit according to claim 12, wherein said stabilizing circuit comprises a differential amplifier circuit having one of its inputs coupled to said power coupling transistor and the other coupled to a compensating power supply circuit, the output of said differential amplifier being connected through a pair of transistors to said power coupling transistor.

Claim 16

A current mode type semiconductor logic circuit according to claim 13, wherein said compensating power supplying circuit comprises a pair of transistors connected in series, the characteristics of one of which corresponds substantially to said power coupling transistor and a biasing transistor connected between said power source and said one transistor of said pair for maintaining the collector current thereof substantially the same as the collector current of said power coupling transistor.