US3755793A — Latent image memory with single-device cells of t…

Claim 1

Independent Claim 128 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising an array of memory cells, a first set of said memory cells each comprising a first type of active device and each adapted to store either one of two binary digits, a second set of said memory cells each comprising a second type of active device and each including means responsive to a first condition for storing either one of two binary digits and responsive to a second condition for storing only a single predetermined binary digit, and circuit means for selecting either said first condition to render the array operable as a read-write memory or said second condition to render the array operable as a read-only memory.

Claim 2

Dependent Claim 128 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising an array of memory cells, a first set of said memory cells each comprising a first type of active device and each adapted to store either one of two binary digits, a second set of said memory cells each comprising a second type of active device and each including means responsive to a first condition for storing either one of two binary digits and responsive to a second condition for storing only a single predetermined binary digit, and circuit means for selecting either said first condition to render the array operable as a read-write memory or said second condition to render the array operable as a read-only memory.

Claim 3

Dependent Claim 49 words

A memory as set forth in claim 1 and comprising means for supplying power to the memory, said selecting means functioning independently of said power supplying means whereby the memory may function as a read-only memory without the necessity for first powering down and then powering up the memory.

Claim 4

Dependent Claim 23 words

A memory as set forth in claim 1 wherein each of the memory cells of one of said sets comprises a field-effect transistor.

Claim 5

Dependent Claim 27 words

A memory as set forth in claim 3 wherein each of the memory cells of said one set comprises a capacitor connected to the respective field-effect transistor.

Claim 6

Dependent Claim 61 words

A memory as set forth in claim 4 and comprising a plurality of word and bit lines coupled to said field-effect transistors both to write information into the cells of said one set by charging the capacitors through the field-effect transistors and to read information out of the cells of said one set by discharging the capacitors through the field-effect transistors.

Claim 7

Dependent Claim 23 words

A memory as set forth in claim 1 wherein each of the memory cells of one of said sets comprises a charge-coupled device.

Claim 8

Dependent Claim 116 words

A memory as set forth in claim 6 wherein each of said charge-coupled devices comprises a body of semiconductor material embodying a first type dopant, a diffused region of a second opposite type dopant in said body of semiconductor material, a current carrying electrode in ohmic contact with said diffused region, a holding electrode in spaced relation to said current carrying electrode and adapted to exert an electrical field into said body of semiconductor material, and a gate electrode positioned between said current carrying electrode and said holding electrode, said gate electrode being adapted to induce a conductive channel in said body of semiconductor material between said diffused region and a region adjacent said holding electrode.

Claim 9

Dependent Claim 53 words

A memory as set forth in claim 1 wherein said selecting means comprises a plurality of holding electrodes each constituting part of a respective memory cell, and means for selectively applying to said holding electrodes either a first voltage to effect said first condition or a second voltage to effect said second condition.

Claim 10

Dependent Claim 45 words

A memory as set forth in claim 1 wherein each of the memory cells of one of said sets comprises a field-effect transistor and a capacitor connected to said transistor, each of the memory cells of the other of said sets comprising a charge-coupled device.

Claim 11

Dependent Claim 60 words

A memory as set forth in claim 9 wherein said selecting means comprises a plurality of holding electrodes each constituting part of the capacitor or the charge-coupled device of a respective memory cell, and means for Selectively applying to said holding electrodes either a first voltage to effect said first condition or a second voltage to effect said second condition.

Claim 12

Dependent Claim 179 words

A memory as set forth in claim 9 and comprising a plurality of word and bit lines coupled to said field-effect transistors both to write information into the cells of said one set by charging the capacitors through the field-effect transistors and to read information out of the cells of said one set by discharging the capacitors through the field-effect transistors, each of said charge-coupled devices comprising a body of semiconductor material embodying a first type dopant, a diffused region of a second opposite type dopant in said body of semiconductor material, a current carrying electrode in ohmic contact with said diffused region, a holding electrode in space relation to said current carrying electrode and adapted to exert an electrical field into said body of semiconductor material, and a gate electrode positioned between said current carrying electrode and said holding electrode, said gate electrode being adapted to induce a conductive channel in said body of semiconductor material between said diffused region and a region adjacent said holding electrode, said word and bit lines being coupled to said charge-coupled devices.

Claim 13

Dependent Claim 55 words

A memory as set forth in claim 11 wherein each of said capacitors comprises a holding electrode, and said selecting means comprises means for selectively applying to said holding electrodes of said capacitors and said charge-coupled devices either a first voltage to effect said first condition or a second voltage to effect said second condition.

Claim 14

Dependent Claim 49 words

A memory as set forth in claim 12 and comprising means for supplying power to the memory, said selecting means functioning independently of said power supplying means whereby the memory may function as a read-only memory without the necessity for first powering down and then powering up the memory.

Claim 15

Dependent Claim 87 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising a first set of memory cells each comprising a field-effect transistor, a second set of memory cells each comprising a charge-coupled device, and selectively operable circuit means for rendering said charge-coupled device cells either capable of storing only a single pre-determined binary digit so as to provide a read-only memory, or capable of storing either one of two binary digits so as to provide a read-write memory.

Claim 16

Dependent Claim 87 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising a first set of memory cells each comprising a field-effect transistor, a second set of memory cells each comprising a charge-coupled device, and selectively operable circuit means for rendering said charge-coupled device cells either capable of storing only a single pre-determined binary digit so as to provide a read-only memory, or capable of storing either one of two binary digits so as to provide a read-write memory.

Claim 17

Dependent Claim 50 words

A memory as set forth in claim 14 and comprising means for supplying power to the memory, said selectively operable means functioning independently of said power supplying means whereby the memory may function as a read-only memory without the necessity for first powering down and then powering up the memory.

Claim 18

Dependent Claim 27 words

A memory as set forth in claim 14 wherein each of the memory cells of said first set comprises a capacitor connected to the respective field-effect transistor.

Claim 19

Dependent Claim 61 words

A memory as set forth in claim 16 and comprising a plurality of word and bit lines coupled to said field-effect transistors both to write information into the cells of said one set by charging the capacitors through the field-effect transistors and to read information out of the cells of said one set by discharging the capacitors through the field-effect transistors.

Claim 20

Dependent Claim 126 words

A memory as set forth in claim 17 wherein each of said charge-coupled devices comprises a body of semiconductor material embodying a first type dopant, a diffused region of a second opposite type dopant in said body of semiconductor material, a current carrying electrode in ohmic contact with said diffused region, a holding electrode in spaced relation to said current carrying electrode and adapted to exert an electrical field into said body of semiconductor material, a gate electrode positioned between sAid current carrying electrode and said holding electrode, said gate electrode being adapted to induce a conductive channel in said body of semiconductor material between said diffused region and a region adjacent said holding electrode, said word and bit lines being coupled to said charge-coupled devices.

Claim 21

Dependent Claim 50 words

A memory as set forth in claim 18 wherein each of said capacitors comprises a holding electrode, and said selectively operable means comprises means for selectively applying to said holding electrodes of said capacitors and charge-coupled devices either a first voltage or a second voltage different from said first voltage.

Claim 22

Dependent Claim 50 words

A memory as set forth in claim 19 and comprising means for supplying power to the memory, said selectively operable means functioning independently of said power supplying means whereby the memory may function as a read-only memory without the necessity for first powering down and then powering up the memory.

Claim 23

Dependent Claim 49 words

A memory as set forth in claim 14 wherein said selectively operable means comprises a plurality of holding electrodes each constituting part of a respective memory cell, and means for selectively applying to said holding electrodes either a first voltage or a second voltage different from said first voltage.

Claim 24

Dependent Claim 105 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising a first set of memory cells each comprising a first type of active device and capable of storing either one of two binary digits, a second set of memory cells each comprising a second type of active device, and selectively operable circuit means for rendering said second type of active device cells either capable of storing only a predetermined binary digit so as to provide a read-only memory, or capable of storing either one of two binary digits so as to provide a read-write memory.

Claim 25

Dependent Claim 105 words

A latent image memory selectively operable as either a read-write memory or a read-only memory, said latent image memory comprising a first set of memory cells each comprising a first type of active device and capable of storing either one of two binary digits, a second set of memory cells each comprising a second type of active device, and selectively operable circuit means for rendering said second type of active device cells either capable of storing only a predetermined binary digit so as to provide a read-only memory, or capable of storing either one of two binary digits so as to provide a read-write memory.

Claim 26

Dependent Claim 50 words

A memory as set forth in claim 22 and comprising means for supplying power to the memory, said selectively operable means functioning independently of said power supplying means whereby the memory may function as a read-only memory without the necessity for first powering down and then powering up the memory.

Claim 27

Dependent Claim 29 words

A memory as set forth in claim 22 wherein each of the memory cells of said first set comprises a field-effect transistor and a capacitor connected to said transistor.

Claim 28

Dependent Claim 61 words

A memory as set forth in claim 24 and comprising a plurality of word and bit lines coupled to said field-effect transistors both to write information into the cells of said first set by charging the capacitors through the field-effect transistors and to read information out of the cells of said first set by discharging the capacitors through the field-effect transistors.

Claim 29

Dependent Claim 22 words

A memory as set forth in claim 22 wherein each of the memory cells of said second set comprises a charge-coupled device.

Claim 30

Dependent Claim 115 words

A memory as set forth in claim 26 wherein each of said charge-coupled devices comprises a body of semiconductor material embodying a first type dopant, a diffused region of a second opposite type dopant in said body of semiconductor material, a current carrying electrode in ohmic contact with said diffused region, a charge storage electrode in spaced relation to said current carrying electrode adapted to exert an electrical field into said body of semiconductor material, a gate electrode positioned between said current carrying electrode and said charge storage electrode, said gate electrode being adapted to induce a conductive channel in said body of semiconductor material between said current carrying electrode and said charge storage electrode.

Claim 31

Dependent Claim 43 words

A memory as set forth in claim 22 wherein each of the memory cells of said first set comprises a field-effect transistor and a capacitor connected to said transistor, and each of the memory cells of said second set comprises a charge-coupled device.

Claim 32

Dependent Claim 125 words

A latent image memory comprising an array of memory cells arranged in rows and columns, a first set of said cells each comprising a field-effect transistor and a capacitor connected thereto, a second set of said cells each comprising a charge-coupled device, each of said field-effect transistors and said charge-coupled devices having a substrate of one conductivity type, a region therein of the opposite conductivity type, and a gate extending adjacent to and insulated from said substrate, each of said capacitors and said charge-coupled devices having a holding electrode, a plurality of word lines each connected to the gates of a respective row of cells, and a plurality of bit lines each connected to the opposite conductivity type regions of a respective column of cells.

Claim 33

Dependent Claim 125 words

A latent image memory comprising an array of memory cells arranged in rows and columns, a first set of said cells each comprising a field-effect transistor and a capacitor connected thereto, a second set of said cells each comprising a charge-coupled device, each of said field-effect transistors and said charge-coupled devices having a substrate of one conductivity type, a region therein of the opposite conductivity type, and a gate extending adjacent to and insulated from said substrate, each of said capacitors and said charge-coupled devices having a holding electrode, a plurality of word lines each connected to the gates of a respective row of cells, and a plurality of bit lines each connected to the opposite conductivity type regions of a respective column of cells.

Claim 34

Dependent Claim 46 words

A latent image memory as set forth in claim 29 and comprising means for selectively applying to said holding electrodes either a first voltage to render the array operable as a read-write memory or a second voltage to render the array operable as a read-only memory.

Claim 35

Dependent Claim 41 words

A latent image memory as set forth in claim 30 and comprising a plurality of drivers connected to said word lines, a plurality of drivers connected to said bit lines, and a plurality of sense amplifiers connected to said bit lines.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1976-08-27	1977-02-26	1977-08-28	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1980-08-27	1981-02-26	1981-08-28	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1984-08-27	1985-02-26	1985-08-28	$7700.00	Window Closed / Lapsed

Latent image memory with single-device cells of two types

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