Alterable-latent image monolithic memory

Claim 1

A monolithic latent image memory comprising: a. m bistable memory cells for receiving information, b. accessing means, the accessing means operatively connected to said m bistable memory cells for reading and writing the information, c. a predetermined n of said m memory cells each including unbalancing impedance means, where n equals 1, or 2, . . . or m, d. said m memory cells being adapted to interconnect with a power supply, the power supply having an operating level and a non-sustaining level, e. the unbalancing impedance means of each of said predetermined n memory cells being responsive substantially at a transition from the non-sustaining level to the operating level for setting each of said predetermined n memory cells to a first predetermined state so that the n memory cells operate in both a read-write and a read-only mode, f. each of said m memory cells including a first section having a first impedance associated therewith and a second section having a second impedance associated therewith, g. said unbalancing impedance means comprising said first and second impedances, h. said first and second impedances being of different impedance value, i. said first and second impedances comprising parasitic capacitors for providing an AC impedance, j. a semiconductor substrate, k. said m memory cells being integral with said substrate, l. said memory cells comprising semiconductor devices having a plurality of electrode regions and respective electrode terminals, and m. said parasitic capacitors being located between said electrode terminals and said substrate.