Method of fabricating planar semiconductor devices

Claim 1

THE METHOD OF CONSTRUCTING AN INTEGRATED, COMPOSITE TRANSISTOR DEVICE, WHICH COMPRISES: (A) PROVIDING OPENINGS IN A MASKING OXIDE LAYER ON THE SURFACE OF A BODY OF SEMICONDUCTIVE MATERIAL OF GIVEN CONDUCTIVITY TYPE; (B) SIMULTANEOUSLY DIFFUSION-GENERATING IN SAID BODY THROUGH USE OF SAID OPENINGS A COPLANAR GROUPING OF CLOSELY SPACED REGIONS OF CONDUCTIVITY TYPE OPPOSITE THAT OF SAID BODY, WHICH GROUPING, AS VIEWED IN THE PLANE OF THE DIFFUSANT-EXPOSED SURFACE OF SAID DEVICE, COMPRISES A CENTRAL REGION OF GENERALLY RECTANGULAR CONFIGURATION, DISPOSED IN INTERDIGITATING RELATION WITH OPPOSED C-SHAPED REGIONS; (C) LIMITING THE TIME OF SAID DIFFUSION TO CONTROL THE LATERAL SPREAD OF SAID DIFFUSANT TO DEFINE ZONES OF SUCH ADJACENCY AS TO PERMIT TRANSISTOR ACTION THEREBETWEEN; AND (D) MAKING ELECTRICAL CONNECTION TO SAID TWO C-SHAPED REGIONS AND TO SAID CENTRAL REGION RESPECTIVELY TO PERMIT THEIR OPERATION AS THE DUAL EMITTERS AND COMMON COLLECTOR OF SAID INTEGRATED DEVICE.

Claim 2

THE METHOD OF CONSTRUCTING AN INTEGRATED, COMPOSITE TRANSISTOR DEVICE, WHICH COMPRISES: (A) PROVIDING OPENINGS IN A MASKING OXIDE LAYER ON THE SURFACE OF A BODY OF SEMICONDUCTIVE MATERIAL OF GIVEN CONDUCTIVITY TYPE; (B) SIMULTANEOUSLY DIFFUSION-GENERATING IN SAID BODY THROUGH USE OF SAID OPENINGS A COPLANAR GROUPING OF CLOSELY SPACED REGIONS OF CONDUCTIVITY TYPE OPPOSITE THAT OF SAID BODY, WHICH GROUPING, AS VIEWED IN THE PLANE OF THE DIFFUSANT-EXPOSED SURFACE OF SAID DEVICE, COMPRISES A CENTRAL REGION OF GENERALLY RECTANGULAR CONFIGURATION, DISPOSED IN INTERDIGITATING RELATION WITH OPPOSED C-SHAPED REGIONS; (C) LIMITING THE TIME OF SAID DIFFUSION TO CONTROL THE LATERAL SPREAD OF SAID DIFFUSANT TO DEFINE ZONES OF SUCH ADJACENCY AS TO PERMIT TRANSISTOR ACTION THEREBETWEEN; AND (D) MAKING ELECTRICAL CONNECTION TO SAID TWO C-SHAPED REGIONS AND TO SAID CENTRAL REGION RESPECTIVELY TO PERMIT THEIR OPERATION AS THE DUAL EMITTERS AND COMMON COLLECTOR OF SAID INTEGRATED DEVICE.