Data transfer circuit of computer

Abstract

Abstract PURPOSE:To make data transfer possible without intervention of computers and without holding them by connecting directly memory address drivers and memory data drivers on both computer sides to each other respectively and providing a transfer switching controller. CONSTITUTION:The start address is designated by an address register 29. The number of data to be transferred is set to a counter 30, and data drivers 17 and 18 are set by a read/write set means 27. A switching means 26 is switched to the transfer mode, and computers 11, 12 and memories 19, 20 are disconnected, and memories 19 and 20 are connected directly by directly connecting lines l1 and l2. Each time a timing circuit generates a timing clock, data in the memory 19 is transferred to the memory 20 through the line l2 successively from the start address. This transfer is continued until the counter 30 generates a count end signal. When the transfer is completed, an interrupt signal is applied from the switching means 26 to computers 11 and 12, and memories are connected to computers 11 and 12 again.

Inventors

• 👤 Keiichi Fujimoto
• 👤 藤本　佳一

Bibliographic Details