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JPS5622157A Expired / Lapsed JP ⏱️ 0.0 years remaining

Process system multiplexing system

Assignee: Fujitsu Ltd
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Filing: 1979-07-31
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Granted: —
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Expires: 1999-07-31
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Abstract

Abstract PURPOSE: To eliminate the procedure for the transmission of data between the process system and at the same time secure an independent unit constitution for each system, by providing the principal and vice bus controllers between the systems. CONSTITUTION: Process system A consisting of CPU1 and memory 2 is connected to process system B comprising CPU4 and memory 5 via principal bus controller BCCM11-1 and vice bus controller BCCS12-1. At the same time, BCCS11-2 is connected to BCCM12-2 via line wires 13 and 14 each. In case the communication is given to system B from system A, the address of memory 5 is written into memory address register 21 of BCCS12-1 from CPU1. And the data is written into output buffer register 22. At the same time, the data of register 22 is written into memory 5 under the control of direct memory access control circuit 23. In case the communication is received at system A from system B, the data given from memory 5 is written into input buffer register 34 by the reading command given from command register 33. And CPU1 gives access to register 34 to read out the contents. COPYRIGHT: (C)1981,JPO&Japio

Inventors

  • 👤 Shuji Yoshida
  • 👤 Kenji Morosawa
  • 👤 Masahiro Hata

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-11-01 14:33
CPC Classifications
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