Integrated circuit with multilayer wiring and method for manufacturing it

Abstract

Abstract An integrated circuit in which a first conductor track level with conductor tracks (AL1) is applied and structured on an insulating layer (IS) on a substrate (SU). On top of said insulating layer, two insulating layers (IS1, IS2) consisting, for example, of polyimide or silicon nitride are applied and structured to produce vias (KL). According to the invention, a third insulating layer (IS3) consisting, for example, of silicon nitride is then applied and so structured that lateral edges (F1) of the first two insulating layers (IS1, IS2) in the vias (KL) remain covered. A second conductor track level is then applied to said third insulating layer and structured to form conductor tracks (AL2). A further three insulating layers (IS10, IS20, IS30) are in each case applied and structured between further conductor track levels to be applied with conductor tracks (AL3) in the same way as the first three insulating layers (IS1, IS2, IS3). <IMAGE>

Inventors

• 👤 Nicolas Dr. Rer. Nat. Phys. Kokkotakis

Bibliographic Details