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US7868462B2 Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor package including transformer or antenna

Assignee: Samsung Electronics Co Ltd
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Filing: 2006-10-03
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Granted: 2011-01-11
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Expires: 2026-10-03
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Abstract

Abstract A semiconductor package comprises a package board and a plurality of semiconductor chips sequentially stacked on the package board. Each of the semiconductor chips comprises a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate. The open loop-shaped chip line has first and second end portions. The first and second end portions of the open loop-shaped chip lines are electrically connected to each other by connectors, and the connectors and the open loop-shaped chip lines constitute a spiral antenna.

Inventors

  • 👤 Yun-seok Choi
  • 👤 Hee-Seok Lee

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 11:21
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/60; H01; H01Q; H01Q9/00; H01Q9/04; H01Q9/16; H01Q9/26; H01Q9/27; H10W20/00; H10W20/40; H10W20/497; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W74/117; H10W72/00; H10W72/01; H10W72/50; H10W72/551; H10W72/552; H10W72/851; H10W72/874; H10W72/877; H10W72/879; H10W72/884; H10W72/90; H10W72/921; H10W72/923; H10W74/15; H10W90/20; H10W90/291; H10W90/297; H10W90/701; H10W90/721; H10W90/722; H10W90/724; H10W90/731; H10W90/732; H10W90/734; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 165 words
A semiconductor package comprising: a package board; a plurality of semiconductor chips sequentially stacked on the package board, each of the semiconductor chips including a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate, and each of the open loop-shaped chip lines having first and second end portions; a first group of connectors electrically connecting the first end portion of a topmost open loop-shaped chip line among the open loop-shaped chip lines, the second end portion of a lowest open loop-shaped chip line of the open loop-shaped chip lines, and the first and second end portions of intermediate open loop-shaped chip lines between the topmost open loop-shaped chip line and the lowest open loop-shaped chip line, thereby constituting a spiral coil together with the open loop-shaped chip lines; and, a second group of connectors electrically connected to the second end portion of the topmost open loop-shaped chip line to form an induction coil of a transformer together with the spiral coil.
Claim 2
Dependent Claim 165 words
A semiconductor package comprising: a package board; a plurality of semiconductor chips sequentially stacked on the package board, each of the semiconductor chips including a semiconductor substrate and an open loop-shaped chip line formed on the semiconductor substrate, and each of the open loop-shaped chip lines having first and second end portions; a first group of connectors electrically connecting the first end portion of a topmost open loop-shaped chip line among the open loop-shaped chip lines, the second end portion of a lowest open loop-shaped chip line of the open loop-shaped chip lines, and the first and second end portions of intermediate open loop-shaped chip lines between the topmost open loop-shaped chip line and the lowest open loop-shaped chip line, thereby constituting a spiral coil together with the open loop-shaped chip lines; and, a second group of connectors electrically connected to the second end portion of the topmost open loop-shaped chip line to form an induction coil of a transformer together with the spiral coil.
Claim 3
Dependent Claim 27 words
The semiconductor package of claim 1 , wherein the first and second groups of connectors comprise metal plugs passing through the semiconductor substrates of the semiconductor chips.
Claim 4
Dependent Claim 64 words
The semiconductor package of claim 1 , wherein the first end portion of the lowest open loop-shaped chip line is electrically connected to a first pad of a lowest chip among the semiconductor chips; and, wherein the second end portion of the topmost open loop-shaped chip line is electrically connected to a second pad of the lowest chip through the second group of connectors.
Claim 5
Dependent Claim 124 words
The semiconductor package of claim 1 , wherein the package board further comprises an open loop-shaped board line provided in a bulk region of the package board or on a surface of the package board to have first and second end portions; wherein the first end portion of the open loop-shaped board line is electrically connected to a first pad of a lowest chip among the semiconductor chips; wherein the second end portion of the open loop-shaped board line is electrically connected to the first end portion of the lowest open loop-shaped chip line; and, wherein the second end portion of the topmost open loop-shaped chip line is electrically connected to a second pad of the lowest chip through the second group of connectors.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2014-01-10 2014-07-12 2015-01-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2018-01-10 2018-07-12 2019-01-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2022-01-10 2022-07-12 2023-01-11 $7700.00 Window Closed / Lapsed

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