Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
287 words
An image synthesis apparatus for synthesizing a plurality of input images with each other to generate a first output image and a second output image, the image synthesis apparatus comprising: a synthesis order storage unit storing a synthesis order designating an order in which the input images are to be synthesized; a synthesis number storage unit storing a first synthesis number and a second synthesis number, the first synthesis number designating how many of the input images are to be synthesized to generate the first output image and the second synthesis number designating how many of the input images are to be synthesized to generate the second output image; an image obtaining unit obtaining the plurality of input images; a buffer storing a synthesized image that results from synthesis; a synthesizer successively performing processing to, in accordance with the synthesis order, synthesize an input image from among the obtained plurality of input images with the synthesized image stored by the buffer, thereby newly obtaining a synthesized image, and store the newly obtained synthesized image in the buffer; a counter that is connected to the synthesizer, the counter having an initial value of zero and counting up each time the buffer newly stores a synthesized image; and an output control unit controlling output of the synthesized image stored in the buffer, such that (a) when a value shown by the counter matches the first synthesis number, the first output image, which is the synthesized image stored in the buffer, is output to the external destination, and (b) when the value shown by the counter matches the second synthesis number, the second output image, which is the synthesized image stored in the buffer, is output to the external destination.
Claim 2
Dependent Claim
287 words
An image synthesis apparatus for synthesizing a plurality of input images with each other to generate a first output image and a second output image, the image synthesis apparatus comprising: a synthesis order storage unit storing a synthesis order designating an order in which the input images are to be synthesized; a synthesis number storage unit storing a first synthesis number and a second synthesis number, the first synthesis number designating how many of the input images are to be synthesized to generate the first output image and the second synthesis number designating how many of the input images are to be synthesized to generate the second output image; an image obtaining unit obtaining the plurality of input images; a buffer storing a synthesized image that results from synthesis; a synthesizer successively performing processing to, in accordance with the synthesis order, synthesize an input image from among the obtained plurality of input images with the synthesized image stored by the buffer, thereby newly obtaining a synthesized image, and store the newly obtained synthesized image in the buffer; a counter that is connected to the synthesizer, the counter having an initial value of zero and counting up each time the buffer newly stores a synthesized image; and an output control unit controlling output of the synthesized image stored in the buffer, such that (a) when a value shown by the counter matches the first synthesis number, the first output image, which is the synthesized image stored in the buffer, is output to the external destination, and (b) when the value shown by the counter matches the second synthesis number, the second output image, which is the synthesized image stored in the buffer, is output to the external destination.
Claim 3
Dependent Claim
102 words
The image synthesis apparatus of claim 1 , wherein each of the input images is stored in a different one of memory areas in an external memory, each memory area being designated by a respective address, the image obtaining unit obtains each input image from the memory area designated by the respective address, and the output control unit controls such that the first output image is output to, in the external memory, a memory area designated by a first predetermined address, and the second output image is output to, in the external memory, a memory area designated by a second predetermined address.
Claim 4
Dependent Claim
28 words
The image synthesis apparatus of claim 1 , wherein the buffer has a capacity that is equivalent to a size of the synthesized image generated by the synthesizer.
Claim 5
Dependent Claim
77 words
The image synthesis apparatus of claim 1 , further comprising a secondary buffer that is equal in capacity to the buffer, wherein, when controlling such that the first output image is output, the output control unit further copies the first output image to the secondary buffer, and the synthesizer performs further synthesis with use of one of (a) the second output image stored in the buffer and (b) the first output image stored in the secondary buffer.
Claim 6
Dependent Claim
309 words
An image synthesis method used in an image synthesis apparatus for synthesizing a plurality of input images with each other to generate a first output image and a second output image, the image synthesis apparatus including: a buffer storing a synthesized image that results from synthesis; and a counter, the image synthesis method comprising the steps of: a synthesis order storage step of storing a synthesis order designating an order in which the input images are to be synthesized; a synthesis number storage step of storing a first synthesis number and a second synthesis number, the first synthesis number designating how many of the input images are to be synthesized to generate the first output image and the second synthesis number designating how many of the input images are to be synthesized to generate the second output image; an image obtaining step of obtaining the plurality of input images; a synthesizing step of successively performing processing to, in accordance with the synthesis order, synthesize an input image from among the obtained plurality of input images with the synthesized image stored by the buffer, thereby newly obtaining a synthesized image, and store the newly obtained synthesized image in the buffer; a counting step for having the counter count up each time the buffer newly stores a synthesized image, an initial value of the counter being zero; and an output control step of controlling output of the synthesized image stored in the buffering step, such that (a) when a value shown by the counter matches the first synthesis number, the first output image, which is a synthesized image stored in the buffer, is output to an external destination, and (b) when the value shown by the counter matches the second synthesis number, the second output image, which is a synthesized image stored in the buffer, is output to the external destination.
Claim 7
Dependent Claim
309 words
An image synthesis method used in an image synthesis apparatus for synthesizing a plurality of input images with each other to generate a first output image and a second output image, the image synthesis apparatus including: a buffer storing a synthesized image that results from synthesis; and a counter, the image synthesis method comprising the steps of: a synthesis order storage step of storing a synthesis order designating an order in which the input images are to be synthesized; a synthesis number storage step of storing a first synthesis number and a second synthesis number, the first synthesis number designating how many of the input images are to be synthesized to generate the first output image and the second synthesis number designating how many of the input images are to be synthesized to generate the second output image; an image obtaining step of obtaining the plurality of input images; a synthesizing step of successively performing processing to, in accordance with the synthesis order, synthesize an input image from among the obtained plurality of input images with the synthesized image stored by the buffer, thereby newly obtaining a synthesized image, and store the newly obtained synthesized image in the buffer; a counting step for having the counter count up each time the buffer newly stores a synthesized image, an initial value of the counter being zero; and an output control step of controlling output of the synthesized image stored in the buffering step, such that (a) when a value shown by the counter matches the first synthesis number, the first output image, which is a synthesized image stored in the buffer, is output to an external destination, and (b) when the value shown by the counter matches the second synthesis number, the second output image, which is a synthesized image stored in the buffer, is output to the external destination.