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Method for fabricating a semiconductor device

Assignee: Fujitsu Semiconductor Ltd
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Filing: 2005-02-28
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Granted: 2007-02-27
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Expires: 2025-02-28
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Abstract

Abstract A semiconductor device has a multi-layer interconnection structure with a first interlayer insulation film and a second interlayer insulation film that is formed on the first interlayer insulation film and has a hardness and an elastic modulus larger than those of the first interlayer insulation film, and is fabricated by a step of forming a resist film on the second interlayer insulation film via an antireflective film, a step of exposing to light and developing the resist film to form a resist pattern, and a step of patterning the antireflective film and the multi-layer interconnection structure using the resist pattern as a mask, wherein a film with no stress or for storing compressive stress is used as the antireflective film.

Inventors

  • 👤 Kengo Inoue

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 19:36
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/425; H10W20/01; H10W20/071; H10W20/074; H10W20/081; H10W20/084

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 113 words
A method for fabricating a semiconductor device having a multi-layer interconnection structure with a first interlayer insulation film and a second interlayer insulation film that is formed on the first interlayer insulation film and has a hardness and an elastic modulus larger than those of the first interlayer insulation film, comprising the steps of: forming a resist film on the second interlayer insulation film via an antireflective film; exposing to light and developing the resist film to form a resist pattern; and patterning the antireflective film and the multi-layer interconnection structure using the resist pattern as a mask, wherein the antireflective film comprises a film with no stress or for storing compressive stress.
Claim 2
Independent Claim 113 words
A method for fabricating a semiconductor device having a multi-layer interconnection structure with a first interlayer insulation film and a second interlayer insulation film that is formed on the first interlayer insulation film and has a hardness and an elastic modulus larger than those of the first interlayer insulation film, comprising the steps of: forming a resist film on the second interlayer insulation film via an antireflective film; exposing to light and developing the resist film to form a resist pattern; and patterning the antireflective film and the multi-layer interconnection structure using the resist pattern as a mask, wherein the antireflective film comprises a film with no stress or for storing compressive stress.
Claim 3
Dependent Claim 37 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the value of stress in the antireflective film is not greater than 100 Mpa, where the stress in the film is tensile stress.
Claim 4
Dependent Claim 26 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the antireflective film is a film in which compressive stress is stored.
Claim 5
Dependent Claim 21 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the antireflective film comprises a SiN film.
Claim 6
Dependent Claim 32 words
The method for fabricating a semiconductor device as claimed in claim 4 , wherein the antireflective film is formed by using a silane gas and an ammonia gas in a nitrogen plasma.
Claim 7
Dependent Claim 59 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the antireflective film is formed while a high-frequency bias is applied to a substrate according to a plasma CVD method and a power of the high-frequency bias is set so that the antireflective film is a no-stress film or a film for storing compressive stress.
Claim 8
Dependent Claim 21 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the antireflective film comprises a SiON film.
Claim 9
Dependent Claim 29 words
The method for fabricating a semiconductor device as claimed in claim 7 , wherein the antireflective film is formed in a He plasma according to a plasma CVD method.
Claim 10
Dependent Claim 45 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the first interlayer insulation film has a relative dielectric constant equal to or less than 3.0 and the second interlayer insulation film comprises a SiOC film or a SiO 2 film.
Claim 11
Dependent Claim 69 words
The method for fabricating a semiconductor device as claimed in claim 1 , wherein the antireflective film is formed while two high-frequency biases comprising a fist high-frequency bias and a second high-frequency bias are applied to a substrate according to a plasma CVD method and powers of the two high-frequency biases are set so that the antireflective film is a no-stress film or a film for storing compressive stress.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2010-02-26 2010-08-28 2011-02-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2014-02-26 2014-08-28 2015-02-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2018-02-26 2018-08-28 2019-02-27 $7700.00 Window Closed / Lapsed

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