Patent US7164165B2 successfully refreshed from Google Patents.
US7164165B2
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US
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MIS capacitor
Assignee: Round Rock Research LLC
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Filing: 2002-05-16
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Granted: 2007-01-16
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Expires: 2022-05-16
Abstract
Abstract An MIS capacitor with low leakage and high capacitance is disclosed. A layer of hemispherical grained polysilicon (HSG) is formed as a lower electrode. Prior to the dielectric formation, the hemispherical grained polysilicon layer may be optionally subjected to a nitridization or anneal process. A dielectric layer of aluminum oxide (Al 2 O 3 ), or a composite stack of interleaved layers of aluminum oxide and other metal oxide dielectric materials, is fabricated over the hemispherical grained polysilicon layer and after the optional nitridization or anneal process. The dielectric layer of aluminum oxide (Al 2 O 3 ) or the aluminum oxide composite stack may be optionally subjected to a post-deposition treatment to further increase the capacitance and decrease the leakage current. A metal nitride upper electrode is formed over the dielectric layer or the composite stack by a deposition technique or by atomic layer deposition.
Inventors
- 👤 Cem Basceri
- 👤 Garo J. Derderian
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:33
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/01; H10D1/041; H10D1/042; H10D1/60; H10D1/62; H10D1/66; H10D1/68; H10D1/682; H10D1/692; H10D1/711; H10D1/712; H10D1/716; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10P14/6339; H10P14/66; H10P14/662; H10P14/69; H10P14/692; H10P14/6938; H10P14/6939; H10P14/69391; H10P14/69392; H10P14/69393; H10P14/69397
Claims Analysis
Total Claims: 69
Claim 1
Independent Claim
94 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, said dielectric layer comprising interleaved layers, at least one of said interleaved layers comprising aluminum oxide, said dielectric layer further comprising a dielectric material adjacent said aluminum oxide; a silicon-doped aluminum-containing interfacial layer at the interface between said lower electrode and said dielectric layer; and a metal nitride upper electrode formed over said dielectric layer.
Claim 2
Dependent Claim
94 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, said dielectric layer comprising interleaved layers, at least one of said interleaved layers comprising aluminum oxide, said dielectric layer further comprising a dielectric material adjacent said aluminum oxide; a silicon-doped aluminum-containing interfacial layer at the interface between said lower electrode and said dielectric layer; and a metal nitride upper electrode formed over said dielectric layer.
Claim 3
Dependent Claim
29 words
The MIS capacitor of claim 1 , wherein said dielectric material is selected from the group consisting of tantalum oxide, zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloys and lanthanum-aluminum-oxygen alloys.
Claim 4
Dependent Claim
20 words
The MIS capacitor of claim 2 , wherein said dielectric layer comprises interleaved layers of aluminum oxide and tantalum oxide.
Claim 5
Dependent Claim
22 words
The MIS capacitor of claim 2 , wherein said dielectric layer is formed of interleaved layers of aluminum oxide and tantalum oxide.
Claim 6
Dependent Claim
24 words
The MIS capacitor of claim 1 , wherein said at least one of said interleaved layers consists essentially of an aluminum oxide dielectric layer.
Claim 7
Dependent Claim
22 words
The MIS capacitor of claim 1 , wherein said at least one of said interleaved layers is an ALD aluminum oxide layer.
Claim 8
Dependent Claim
23 words
The MIS capacitor of claim 6 , wherein said at least one of said interleaved layers is an annealed ALD aluminum oxide layer.
Claim 9
Dependent Claim
24 words
The MIS capacitor of claim 6 , wherein said ALD aluminum oxide layer has a thickness of about 10 Angstroms to about 100 Angstroms.
Claim 10
Dependent Claim
16 words
The MIS capacitor of claim 1 , wherein said upper electrode is a tungsten nitride layer.
Claim 11
Dependent Claim
17 words
The MIS capacitor of claim 9 , wherein said upper electrode is an ALD tungsten nitride layer.
Claim 12
Dependent Claim
20 words
The MIS capacitor of claim 10 , wherein said ALD tungsten nitride layer is a nitridized ALD tungsten nitride layer.
Claim 13
Dependent Claim
16 words
The MIS capacitor of claim 1 , wherein said upper electrode is a titanium nitride layer.
Claim 14
Dependent Claim
17 words
The MIS capacitor of claim 12 , wherein said upper electrode is an ALD titanium nitride layer.
Claim 15
Dependent Claim
20 words
The MIS capacitor of claim 13 , wherein said ALD titanium nitride layer is a nitridized ALD titanium nitride layer.
Claim 16
Dependent Claim
17 words
The MIS capacitor of claim 1 , wherein said upper electrode is a boron-doped titanium nitride layer.
Claim 17
Dependent Claim
20 words
The MIS capacitor of claim 15 , wherein said boron-doped titanium nitride layer is a nitridized boron-doped titanium nitride layer.
Claim 18
Dependent Claim
17 words
The MIS capacitor of claim 1 , wherein said lower electrode is formed of hemispherical grained polysilicon.
Claim 19
Dependent Claim
24 words
The MIS capacitor of claim 17 , wherein said lower electrode is formed of etched hemispherical grained polysilicon with activated hemispherical grained polysilicon grains.
Claim 20
Dependent Claim
20 words
The MIS capacitor of claim 18 , wherein said etched hemispherical grained polysilicon is a nitridized etched hemispherical grained polysilicon.
Claim 21
Dependent Claim
19 words
The MIS capacitor of claim 18 , wherein said etched hemispherical grained polysilicon is an annealed hemispherical grained polysilicon.
Claim 22
Dependent Claim
62 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, wherein said dielectric layer comprises an aluminum oxide/tantalum oxide/aluminum oxide composite stack; and a metal nitride upper electrode formed over said dielectric layer.
Claim 23
Dependent Claim
62 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, wherein said dielectric layer comprises an aluminum oxide/tantalum oxide/aluminum oxide composite stack; and a metal nitride upper electrode formed over said dielectric layer.
Claim 24
Dependent Claim
83 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, said dielectric layer comprising interleaved layers, at least one of said interleaved layers comprising aluminum oxide; and an upper electrode formed over said dielectric layer, said upper electrode comprising a boron-doped titanium nitride layer having a boron concentration of about 0.01% to about 30%.
Claim 25
Dependent Claim
83 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer formed over said lower electrode, said dielectric layer comprising interleaved layers, at least one of said interleaved layers comprising aluminum oxide; and an upper electrode formed over said dielectric layer, said upper electrode comprising a boron-doped titanium nitride layer having a boron concentration of about 0.01% to about 30%.
Claim 26
Dependent Claim
51 words
A capacitor comprising: a lower electrode formed over a semiconductor substrate; a dielectric layer comprising aluminum oxide formed over said lower electrode; a silicon-doped aluminum-containing layer at the interface between said lower electrode and said dielectric layer comprising aluminum oxide; and a metal nitride upper electrode formed over said dielectric layer.
Claim 27
Dependent Claim
51 words
A capacitor comprising: a lower electrode formed over a semiconductor substrate; a dielectric layer comprising aluminum oxide formed over said lower electrode; a silicon-doped aluminum-containing layer at the interface between said lower electrode and said dielectric layer comprising aluminum oxide; and a metal nitride upper electrode formed over said dielectric layer.
Claim 28
Dependent Claim
23 words
The MIS capacitor of claim 23 , wherein said silicon-doped aluminum-containing layer has a thickness of about 5 Angstroms to about 50 Angstroms.
Claim 29
Dependent Claim
16 words
The MIS capacitor of claim 23 , wherein said silicon-doped aluminum-containing layer is an aluminum-oxygen-silicon layer.
Claim 30
Dependent Claim
101 words
A memory device comprising: a substrate; a memory cell formed over said substrate, said memory cell comprising a transistor including a gate fabricated on said substrate, and source and drain regions in said substrate disposed adjacent to said gate; and a charge storage capacitor electrically connected to one of said source and drain regions, said capacitor comprising a semiconductive layer, a dielectric layer formed over said semiconductive layer, said dielectric comprising an aluminum oxide layer and at least one aluminum-containing interfacial layer between said aluminum oxide layer and said semiconductive layer, and a metal nitride layer formed over said dielectric layer.
Claim 31
Dependent Claim
101 words
A memory device comprising: a substrate; a memory cell formed over said substrate, said memory cell comprising a transistor including a gate fabricated on said substrate, and source and drain regions in said substrate disposed adjacent to said gate; and a charge storage capacitor electrically connected to one of said source and drain regions, said capacitor comprising a semiconductive layer, a dielectric layer formed over said semiconductive layer, said dielectric comprising an aluminum oxide layer and at least one aluminum-containing interfacial layer between said aluminum oxide layer and said semiconductive layer, and a metal nitride layer formed over said dielectric layer.
Claim 32
Dependent Claim
21 words
The memory device of claim 26 , wherein said aluminum oxide dielectric layer further comprises a material adjacent said aluminum oxide.
Claim 33
Dependent Claim
28 words
The memory device of claim 27 , wherein said material is selected from the group consisting of tantalum oxide, zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloys and lanthanum-aluminum-oxygen alloys.
Claim 34
Dependent Claim
17 words
The memory device of claim 27 , wherein said aluminum oxide dielectric layer further comprises tantalum oxide.
Claim 35
Dependent Claim
24 words
The memory device of claim 27 , wherein said aluminum oxide dielectric layer is formed of interleaved layers of aluminum oxide and tantalum oxide.
Claim 36
Dependent Claim
19 words
The memory device of claim 27 , wherein said aluminum oxide dielectric layer is an ALD aluminum oxide layer.
Claim 37
Dependent Claim
20 words
The memory device of claim 31 , wherein said aluminum oxide dielectric layer is an annealed ALD aluminum oxide layer.
Claim 38
Dependent Claim
24 words
The memory device of claim 31 , wherein said ALD aluminum oxide layer has a thickness of about 10 Angstroms to about 100 Angstroms.
Claim 39
Dependent Claim
17 words
The memory device of claim 26 , wherein said metal nitride layer is a tungsten nitride layer.
Claim 40
Dependent Claim
18 words
The memory device of claim 34 , wherein said metal nitride layer is an ALD tungsten nitride layer.
Claim 41
Dependent Claim
20 words
The memory device of claim 35 , wherein said ALD tungsten nitride layer is a nitridized ALD tungsten nitride layer.
Claim 42
Dependent Claim
17 words
The memory device of claim 26 , wherein said metal nitride layer is a titanium nitride layer.
Claim 43
Dependent Claim
18 words
The memory device of claim 37 , wherein said metal nitride layer is an ALD titanium nitride layer.
Claim 44
Dependent Claim
20 words
The memory device of claim 38 , wherein said ALD titanium nitride layer is a nitridized ALD titanium nitride layer.
Claim 45
Dependent Claim
18 words
The memory device of claim 26 , wherein said metal nitride layer is a boron-doped titanium nitride layer.
Claim 46
Dependent Claim
20 words
The memory device of claim 40 , wherein said boron-doped titanium nitride layer is a nitridized boron-doped titanium nitride layer.
Claim 47
Dependent Claim
29 words
The memory device of claim 26 , wherein said semiconductive layer is formed of a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon.
Claim 48
Dependent Claim
17 words
The memory device of claim 42 , wherein said semiconductive layer is formed of hemispherical grained polysilicon.
Claim 49
Dependent Claim
24 words
The memory device of claim 43 , wherein said semiconductive layer is formed of etched hemispherical grained polysilicon with activated hemispherical grained polysilicon grains.
Claim 50
Dependent Claim
20 words
The memory device of claim 44 , wherein said etched hemispherical grained polysilicon is a nitridized etched hemispherical grained polysilicon.
Claim 51
Dependent Claim
19 words
The memory device of claim 44 , wherein said etched hemispherical grained polysilicon is an annealed hemispherical grained polysilicon.
Claim 52
Dependent Claim
16 words
The memory device of claim 26 , wherein said memory cell is a DRAM memory cell.
Claim 53
Dependent Claim
16 words
The memory device of claim 26 , wherein said memory cell is a SRAM memory cell.
Claim 54
Dependent Claim
118 words
A memory device comprising: a substrate; a memory cell formed over said substrate, said memory cell comprising a transistor including a gate fabricated on said substrate, and source and drain regions in said substrate disposed adjacent to said gate; and a charge storage capacitor electrically connected to one of said source and drain regions, said capacitor comprising a semiconductive layer, a dielectric layer formed over said semiconductive layer, said dielectric comprising an aluminum oxide layer and at least one aluminum-containing interfacial layer between said aluminum oxide layer and said semiconductive layer, and a boron-doped titanium nitride layer formed over said dielectric layer, wherein said boron-doped titanium nitride layer has a boron concentration of about 0.01% to about 30%.
Claim 55
Dependent Claim
118 words
A memory device comprising: a substrate; a memory cell formed over said substrate, said memory cell comprising a transistor including a gate fabricated on said substrate, and source and drain regions in said substrate disposed adjacent to said gate; and a charge storage capacitor electrically connected to one of said source and drain regions, said capacitor comprising a semiconductive layer, a dielectric layer formed over said semiconductive layer, said dielectric comprising an aluminum oxide layer and at least one aluminum-containing interfacial layer between said aluminum oxide layer and said semiconductive layer, and a boron-doped titanium nitride layer formed over said dielectric layer, wherein said boron-doped titanium nitride layer has a boron concentration of about 0.01% to about 30%.
Claim 56
Dependent Claim
78 words
A processor-based system comprising: a processor; and an integrated circuit coupled to said processor, at least one of said integrated circuit and processor containing a capacitor, said capacitor comprising a hemispherical grained polysilicon lower capacitor electrode; a nitridized ALD aluminum oxide dielectric layer formed over said lower capacitor electrode, wherein said aluminum oxide dielectric layer further comprises a material incorporated with said aluminum oxide; and a metal nitride upper capacitor electrode formed over said aluminum oxide dielectric layer.
Claim 57
Dependent Claim
78 words
A processor-based system comprising: a processor; and an integrated circuit coupled to said processor, at least one of said integrated circuit and processor containing a capacitor, said capacitor comprising a hemispherical grained polysilicon lower capacitor electrode; a nitridized ALD aluminum oxide dielectric layer formed over said lower capacitor electrode, wherein said aluminum oxide dielectric layer further comprises a material incorporated with said aluminum oxide; and a metal nitride upper capacitor electrode formed over said aluminum oxide dielectric layer.
Claim 58
Dependent Claim
22 words
The processor-based system of claim 50 , wherein said hemispherical grained polysilicon lower electrode is a nitridized hemispherical grained polysilicon lower electrode.
Claim 59
Dependent Claim
28 words
The processor-based system of claim 50 , wherein said material is selected from the group consisting of tantalum oxide, zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloys and lanthanum-aluminum-oxygen alloys.
Claim 60
Dependent Claim
15 words
The processor-based system of claim 50 , wherein said integrated circuit is a memory device.
Claim 61
Dependent Claim
16 words
The processor-based system of claim 53 , wherein said memory device is a DRAM memory device.
Claim 62
Dependent Claim
16 words
The processor-based system of claim 53 , wherein said memory device is a SRAM memory device.
Claim 63
Dependent Claim
73 words
A capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising hemispherical grained polysilicon; a dielectric layer comprising aluminum oxide formed over said lower electrode, said dielectric layer further comprising a material incorporated with said aluminum oxide, said material being selected from the group consisting of tantalum oxide, zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloys and lanthanum-aluminum-oxygen alloys; and a boron-doped titanium nitride upper electrode formed over said dielectric layer.
Claim 64
Dependent Claim
73 words
A capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising hemispherical grained polysilicon; a dielectric layer comprising aluminum oxide formed over said lower electrode, said dielectric layer further comprising a material incorporated with said aluminum oxide, said material being selected from the group consisting of tantalum oxide, zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloys and lanthanum-aluminum-oxygen alloys; and a boron-doped titanium nitride upper electrode formed over said dielectric layer.
Claim 65
Dependent Claim
25 words
The capacitor of claim 56 , wherein said aluminum oxide dielectric layer is formed of interleaved layers of aluminum oxide and at least another material.
Claim 66
Dependent Claim
28 words
The capacitor of claim 57 , wherein said at least another material is selected from the group consisting of zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloy and lanthanum-aluminum-oxygen alloy.
Claim 67
Dependent Claim
72 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer comprising interleaved layers of aluminum oxide and at least another material selected from the group consisting of zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloy and lanthanum-aluminum-oxygen alloy; and a boron-doped titanium nitride upper electrode formed over said dielectric layer.
Claim 68
Dependent Claim
72 words
An MIS capacitor comprising: a lower electrode formed over a semiconductor substrate, said lower electrode comprising a material selected from the group consisting of hemispherical grained polysilicon, silica, germanium and silicon; a dielectric layer comprising interleaved layers of aluminum oxide and at least another material selected from the group consisting of zirconium oxide, hafnium oxide, hafnium-aluminum-oxygen alloy and lanthanum-aluminum-oxygen alloy; and a boron-doped titanium nitride upper electrode formed over said dielectric layer.
Claim 69
Dependent Claim
22 words
The MIS capacitor of claim 59 , wherein said dielectric layer has a thickness of about 10 Angstroms to about 100 Angstroms.
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